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[209.132.180.67]) by mx.google.com with ESMTP id c9si3438471eds.211.2019.10.04.08.38.42; Fri, 04 Oct 2019 08:39:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=SbincJkH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=opensource.cirrus.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389970AbfJDPiC (ORCPT + 99 others); Fri, 4 Oct 2019 11:38:02 -0400 Received: from mx0a-001ae601.pphosted.com ([67.231.149.25]:32050 "EHLO mx0b-001ae601.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389700AbfJDPiC (ORCPT ); Fri, 4 Oct 2019 11:38:02 -0400 Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x94FXxfH009052; Fri, 4 Oct 2019 10:37:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=PODMain02222019; bh=SSXcsjs5T/Ho7TGSsqHt8nDV+AuMkJ07Gr9/E1wJO1M=; b=SbincJkHlDTy5CSOzXAfnrVcbiVOmacyiXPbZV8wMWLpi0+DRxYbXtb5ExUWMCC9MMVl p0A2Lato9985gwRE2sjM91HOr/g3e1bvm/ggRHXncZgZjaQSRXUgrryw5wAWDb7YVsm/ HNS2gkyLyNlcsJZVJJRrHbYAEc0iTrhRq8xGkMlR7XZOU4lHpHJ/G6PGRgY6/81NYWSx EjOKpIM2JTeSc7BiHwVkC7HtqrkVSZPM0kMOzZYqDLG/4LkUxpqrVw051zc5UPFzj5rm R+Ttzcf/9X/1HrGfmSEebCez1fgztu5WjFAgiQDDebj1IWQ+oQkOEdvFl0+SDAP/x1J4 sA== Authentication-Results: ppops.net; spf=fail smtp.mailfrom=ckeepax@opensource.cirrus.com Received: from ediex01.ad.cirrus.com ([87.246.76.36]) by mx0a-001ae601.pphosted.com with ESMTP id 2va4x4t8r0-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Fri, 04 Oct 2019 10:37:57 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1591.10; Fri, 4 Oct 2019 16:37:54 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.1591.10 via Frontend Transport; Fri, 4 Oct 2019 16:37:54 +0100 Received: from algalon.ad.cirrus.com (algalon.ad.cirrus.com [198.90.251.122]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 19C4B2D4; Fri, 4 Oct 2019 15:37:54 +0000 (UTC) From: Charles Keepax To: CC: , , , , Subject: [PATCH v4 2/3] mfd: madera: Update DT binding document to support clock supplies Date: Fri, 4 Oct 2019 16:37:52 +0100 Message-ID: <20191004153753.8369-2-ckeepax@opensource.cirrus.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20191004153753.8369-1-ckeepax@opensource.cirrus.com> References: <20191004153753.8369-1-ckeepax@opensource.cirrus.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-SPF-Result: fail X-Proofpoint-SPF-Record: v=spf1 include:spf-001ae601.pphosted.com include:spf.protection.outlook.com -all X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 phishscore=0 impostorscore=0 priorityscore=1501 suspectscore=1 bulkscore=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1910040138 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the 3 input clock sources for the chip into the device tree binding document. Reviewed-by: Rob Herring Signed-off-by: Charles Keepax --- No changes since v3. Documentation/devicetree/bindings/mfd/madera.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/madera.txt b/Documentation/devicetree/bindings/mfd/madera.txt index cad0f28005027..47e2b8bc60519 100644 --- a/Documentation/devicetree/bindings/mfd/madera.txt +++ b/Documentation/devicetree/bindings/mfd/madera.txt @@ -67,6 +67,14 @@ Optional properties: As defined in bindings/gpio.txt. Although optional, it is strongly recommended to use a hardware reset + - clocks: Should reference the clocks supplied on MCLK1, MCLK2 and MCLK3 + - clock-names: May contain up to three strings: + "mclk1" for the clock supplied on MCLK1, recommended to be a high + quality audio reference clock + "mclk2" for the clock supplied on MCLK2, required to be an always on + 32k clock + "mclk3" for the clock supplied on MCLK3 + - MICBIASx : Initial data for the MICBIAS regulators, as covered in Documentation/devicetree/bindings/regulator/regulator.txt. One for each MICBIAS generator (MICBIAS1, MICBIAS2, ...) -- 2.11.0