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[67.0.10.3]) by smtp.gmail.com with ESMTPSA id m14sm2634004ild.3.2019.10.04.10.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Oct 2019 10:36:55 -0700 (PDT) Date: Fri, 4 Oct 2019 10:36:54 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: torvalds@linux-foundation.org cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [GIT PULL] RISC-V updates for v5.4-rc2 Message-ID: User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Linus, The following changes since commit 54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c: Linux 5.4-rc1 (2019-09-30 10:35:40 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.4-rc2 for you to fetch changes up to 922b0375fc93fb1a20c5617e37c389c26bbccb70: riscv: Fix memblock reservation for device tree blob (2019-10-01 13:22:39 -0700) ---------------------------------------------------------------- RISC-V updates for v5.4-rc2 Two RISC-V fixes for v5.4-rc2: - Ensure that exclusive-load reservations are terminated after system call or exception handling. This primarily affects QEMU, which does not expire load reservations. - Fix an issue primarily affecting RV32 platforms that can cause the DT header to be corrupted, causing boot failures. ---------------------------------------------------------------- Albert Ou (1): riscv: Fix memblock reservation for device tree blob Palmer Dabbelt (1): RISC-V: Clear load reservations while restoring hart contexts arch/riscv/include/asm/asm.h | 1 + arch/riscv/kernel/entry.S | 21 ++++++++++++++++++++- arch/riscv/mm/init.c | 12 +++++++++++- 3 files changed, 32 insertions(+), 2 deletions(-)