Received: by 2002:a5b:505:0:0:0:0:0 with SMTP id o5csp2413491ybp; Sat, 5 Oct 2019 11:41:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqybN54B0doZQac3F434Z6L7hkXMc4PCwq84LVMNtSTK2prBrTg0d1Y4093OrvZ3QFseD41C X-Received: by 2002:a17:906:4d08:: with SMTP id r8mr3523270eju.283.1570300917782; Sat, 05 Oct 2019 11:41:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570300917; cv=none; d=google.com; s=arc-20160816; b=zXMsFbuyp9gI0kxh4TwBj08IdS3Ou5P7TLp6dk+jmEdSr4KA6UusVhBWVLKuatb+TB bgTsmfisSSp9rMslgGXJPMB82LWMz44l/lVm5sWzMbdflwxAnWqw/yaW7Cuz4e5GRCw6 TMK0kXafMgb1JQ+KANewE1Vqax4KRxm26Q1vd9os0wp7zSBZwTa7eVjPUVm5zCne5MRr WrgNrxRplXQ7hzdq5MHMnqm4ySO6dT4v61sV/RFetf4Xe4nxsb/qrx5EsvHIDO8sop7m pxihwq6kjRLXqypwgXNXOaxkQ1/2DrSxoo7+2byMhsEvMtVHA0CPccsXDjXZfRX0/ShO RGzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DSd0IOl/SfIaZDr2U/8RUT6ZXyKiyqc5Z3E1jM5LeZE=; b=DVdywttGBBA0GzHH8XqpA5en2xGed2CvB+KYMkyNfkx5bkmeWIwMuMqFFTVrPihWbp HrfDWKoivA+rq425UD+uZU5u/9rpeWPmbLBvowtGOLYeRl4hvr3vnY8/gu27IjYUZ/XQ 8ODpBHNGIJL58is9Ojyc8xmos6e6R7VQBC3dofXCxENgwq6O9N/aGnQhcVIhGl0MABjt 1AUf9SQqdwTsV66HJYCVzhpshPNyqJMibZT/N/UoO5/lN9ghL6L2PDuLEnrE7V6C6N1S k46FEnK5qqpWSEVaXNNoCGMVUuf53nSxJqUn50kHdeSiicpazQh0iIzGPvsPv3HCmIZn p1rA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=TKvHeQVE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m1si4825306ejb.44.2019.10.05.11.41.34; Sat, 05 Oct 2019 11:41:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=TKvHeQVE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388786AbfJESiW (ORCPT + 99 others); Sat, 5 Oct 2019 14:38:22 -0400 Received: from mail-yw1-f68.google.com ([209.85.161.68]:45732 "EHLO mail-yw1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388168AbfJEShf (ORCPT ); Sat, 5 Oct 2019 14:37:35 -0400 Received: by mail-yw1-f68.google.com with SMTP id x65so3557056ywf.12; Sat, 05 Oct 2019 11:37:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DSd0IOl/SfIaZDr2U/8RUT6ZXyKiyqc5Z3E1jM5LeZE=; b=TKvHeQVE7Ireoc37hz2hgKIhyPHqwX0ix2u0tLXmstDJCdr6IuuCXXIyxNJLbJgeXn xuTUXFXnEKTWFVC0pmhVUvUYhw6qcnDqh0HysL+gtREkl7BJhAcVuJP7kxzoxXHEwo4u MEpq52fPvh4tfoVlU7ZurfiDVO7RwMLceOIippXHKYAZsGPOvjxuF5mcD78fvKhjDERM oDFWocStW7aPVNEc8+k/sF4jSeGeHjDq/0odV8u3Q3KIQl8qpQamlc1eIS4FTQbnDoR1 dAC1CWakkZg8J6F2sj7vnl+wEIQGIlFEAleta86KfZetER3BSxbMzQK5rjNtpHviaKIX kcaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DSd0IOl/SfIaZDr2U/8RUT6ZXyKiyqc5Z3E1jM5LeZE=; b=p5ZmqwjHMC9QoKThPRZHNYIenKpZ8m9xIi/CJaawP/Hr3rSThWkJNcTV54skG2BMy0 RFLH0p6RV7twddhFIvRdG+SwMgiGmM187FQjXjBjUFWbYHPp42S5r13qz+7XdG/8cP0m N45sEjbIJ5PYDGQYS0evfMm84yUEMKi3pLSMQPCigEXLeqSBdX4v6M7wlEyJSzLxVAo1 bCBL+9iyoH+G9uR8IQJK1ZTwuSu6PvJ43MNzJ1MNJSHDm4uCJktKTsAaVdzooAzOdyp7 1keDDaxlAx/3M85Kc393GEdKlU6fyvLh6tgP0hBhnUVfU04N8ksezBpC6HkfVjwhyWwX uY6w== X-Gm-Message-State: APjAAAU4+9bT3kwwCIWU/iweuEVesuLSahRUKDdIoymnwo8TI9AVUPq9 /1sfWkGCLs/Jp7h7dqNrM30= X-Received: by 2002:a0d:e64b:: with SMTP id p72mr14596237ywe.347.1570300653865; Sat, 05 Oct 2019 11:37:33 -0700 (PDT) Received: from localhost.localdomain (072-189-084-142.res.spectrum.com. [72.189.84.142]) by smtp.gmail.com with ESMTPSA id g128sm2376654ywb.13.2019.10.05.11.37.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Oct 2019 11:37:33 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org, bgolaszewski@baylibre.com Cc: akpm@linux-foundation.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, yamada.masahiro@socionext.com, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, geert@linux-m68k.org, preid@electromag.com.au, lukas@wunner.de, sean.nyekjaer@prevas.dk, morten.tiljeset@prevas.dk, William Breathitt Gray Subject: [PATCH v15 05/14] gpio: gpio-mm: Utilize for_each_set_clump8 macro Date: Sat, 5 Oct 2019 14:36:59 -0400 Message-Id: X-Mailer: git-send-email 2.23.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 73 +++++++++++-------------------------- 1 file changed, 21 insertions(+), 52 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index 78a1db24e931..72196ea36358 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -164,46 +164,25 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned long offset; + unsigned long gpio_mask; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(gpiommgpio->base + ports[i]); + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + port_addr = gpiommgpio->base + ports[offset / 8]; + port_state = inb(port_addr) & gpio_mask; - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, port_state, offset); } return 0; @@ -234,37 +213,27 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; - unsigned int bitmask; + unsigned long offset; + unsigned long gpio_mask; + size_t index; + unsigned int port_addr; + unsigned long bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + index = offset / 8; + port_addr = gpiommgpio->base + ports[index]; - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + bitmask = bitmap_get_value8(bits, offset) & gpio_mask; spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[index] &= ~gpio_mask; + gpiommgpio->out_state[index] |= bitmask; + outb(gpiommgpio->out_state[index], port_addr); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.23.0