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[209.85.167.176]) by smtp.gmail.com with ESMTPSA id 21sm3044249oin.26.2019.10.05.19.58.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 05 Oct 2019 19:58:23 -0700 (PDT) Received: by mail-oi1-f176.google.com with SMTP id i16so8948643oie.4; Sat, 05 Oct 2019 19:58:23 -0700 (PDT) X-Received: by 2002:aca:e005:: with SMTP id x5mr12668230oig.51.1570330703340; Sat, 05 Oct 2019 19:58:23 -0700 (PDT) MIME-Version: 1.0 References: <20190909090244.42543-1-yinbo.zhu@nxp.com> <20191006025450.GO7150@dragon> In-Reply-To: <20191006025450.GO7150@dragon> From: Li Yang Date: Sat, 5 Oct 2019 21:58:12 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1] usb: dwc3: enable otg mode for dwc3 usb ip on layerscape To: Shawn Guo Cc: Yinbo Zhu , Rob Herring , Mark Rutland , Xiaobo Xie , Jiafei Pan , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , lkml , Ran Wang Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Oct 5, 2019 at 9:56 PM Shawn Guo wrote: > > On Mon, Sep 09, 2019 at 05:02:44PM +0800, Yinbo Zhu wrote: > > layerscape otg function should be supported HNP SRP and ADP protocol > > accroing to rm doc, but dwc3 code not realize it and use id pin to > > detect who is host or device(0 is host 1 is device) this patch is to > > enable OTG mode on ls1028ardb ls1088ardb and ls1046ardb in dts > > > > Signed-off-by: Yinbo Zhu > > The patch prefix should be something like: 'arm64: dts: ...' > > @Leo, do you agree with the changes? No. The USB mode of operation should be defined at board level. > > Shawn > > > --- > > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +- > > arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 2 +- > > arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 2 +- > > 3 files changed, 3 insertions(+), 3 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > index 7975519b4f56..5810d0400dbc 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > > @@ -320,7 +320,7 @@ > > compatible = "fsl,ls1028a-dwc3", "snps,dwc3"; > > reg = <0x0 0x3110000 0x0 0x10000>; > > interrupts = ; > > - dr_mode = "host"; > > + dr_mode = "otg"; > > snps,dis_rxdet_inp3_quirk; > > snps,quirk-frame-length-adjustment = <0x20>; > > snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > > index b0ef08b090dd..ecce6151b9b0 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi > > @@ -582,7 +582,7 @@ > > compatible = "snps,dwc3"; > > reg = <0x0 0x3000000 0x0 0x10000>; > > interrupts = ; > > - dr_mode = "host"; > > + dr_mode = "otg"; > > snps,quirk-frame-length-adjustment = <0x20>; > > snps,dis_rxdet_inp3_quirk; > > snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > index dacd8cf03a7f..4b5413f7c90c 100644 > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi > > @@ -385,7 +385,7 @@ > > compatible = "snps,dwc3"; > > reg = <0x0 0x3110000 0x0 0x10000>; > > interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; > > - dr_mode = "host"; > > + dr_mode = "otg"; > > snps,quirk-frame-length-adjustment = <0x20>; > > snps,dis_rxdet_inp3_quirk; > > status = "disabled"; > > -- > > 2.17.1 > >