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Date:   Tue, 8 Oct 2019 14:50:08 +0200
From:   Christoph Hellwig <hch@lst.de>
To:     Arvind Sankar <nivedita@alum.mit.edu>
Cc:     Christoph Hellwig <hch@lst.de>,
        Christoph Hellwig <hch@infradead.org>,
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Subject: Re: ehci-pci breakage with dma-mapping changes in 5.4-rc2
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On Tue, Oct 08, 2019 at 07:51:03AM -0400, Arvind Sankar wrote:
> What I mean is, do there exist devices (which would necessarily support
> 64-bit DMA) that want to DMA using bigger than 4Gb buffers. Eg a GPU
> accelerator card with 16Gb of RAM on-board that wants to map 6Gb for DMA
> in one go, or 5 accelerator cards that are in one IOMMU domain and want
> to simultaneously map 1Gb each.

If you allocate more than 32-bits worth of address space the IOMMU
address space allocator will dip into 64-bit values if the device
dma mask supports that.