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[209.132.180.67]) by mx.google.com with ESMTP id f47si11412219ede.263.2019.10.08.12.24.59; Tue, 08 Oct 2019 12:25:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729872AbfJHTXt (ORCPT + 99 others); Tue, 8 Oct 2019 15:23:49 -0400 Received: from bhuna.collabora.co.uk ([46.235.227.227]:50154 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726439AbfJHTXt (ORCPT ); Tue, 8 Oct 2019 15:23:49 -0400 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: ezequiel) with ESMTPSA id 1223428ECE6 Message-ID: Subject: Re: [PATCH v3 3/5] drm/rockchip: Add optional support for CRTC gamma LUT From: Ezequiel Garcia To: Sean Paul Cc: dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Heiko =?ISO-8859-1?Q?St=FCbner?= , Sandy Huang , kernel@collabora.com, Sean Paul , Boris Brezillon , Douglas Anderson , Jacopo Mondi , Ilia Mirkin , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jacopo Mondi Date: Tue, 08 Oct 2019 16:23:36 -0300 In-Reply-To: <20191007185432.GG126146@art_vandelay> References: <20190930222802.32088-1-ezequiel@collabora.com> <20190930222802.32088-4-ezequiel@collabora.com> <20191007185432.GG126146@art_vandelay> Organization: Collabora Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.30.5-1.1 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello Sean, On Mon, 2019-10-07 at 14:54 -0400, Sean Paul wrote: > On Mon, Sep 30, 2019 at 07:28:00PM -0300, Ezequiel Garcia wrote: > > Add an optional CRTC gamma LUT support, and enable it on RK3288. > > This is currently enabled via a separate address resource, > > which needs to be specified in the devicetree. > > > > The address resource is required because on some SoCs, such as > > RK3288, the LUT address is after the MMU address, and the latter > > is supported by a different driver. This prevents the DRM driver > > from requesting an entire register space. > > > > The current implementation works for RGB 10-bit tables, as that > > is what seems to work on RK3288. > > > > Signed-off-by: Ezequiel Garcia > > Reviewed-by: Douglas Anderson > > Reviewed-by: Jacopo Mondi > > --- > > Changes from v2: > > * None. > > > > Changes from v1: > > * drop explicit linear LUT after finding a proper > > way to disable gamma correction. > > * avoid setting gamma is the CRTC is not active. > > * s/int/unsigned int as suggested by Jacopo. > > * only enable color management and set gamma size > > if gamma LUT is supported, suggested by Doug. > > * drop the reg-names usage, and instead just use indexed reg > > specifiers, suggested by Doug. > > > > Changes from RFC: > > * Request (an optional) address resource for the LUT. > > * Drop support for RK3399, which doesn't seem to work > > out of the box and needs more research. > > * Support pass-thru setting when GAMMA_LUT is NULL. > > * Add a check for the gamma size, as suggested by Ilia. > > * Move gamma setting to atomic_commit_tail, as pointed > > out by Jacopo/Laurent, is the correct way. > > --- > > drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 3 + > > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 114 ++++++++++++++++++++ > > drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 7 ++ > > drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 2 + > > 4 files changed, 126 insertions(+) > > > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c > > index dba352ec0ee3..fd1d987698ab 100644 > > --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c > > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c > > @@ -17,6 +17,7 @@ > > #include "rockchip_drm_drv.h" > > #include "rockchip_drm_fb.h" > > #include "rockchip_drm_gem.h" > > +#include "rockchip_drm_vop.h" > > > > static const struct drm_framebuffer_funcs rockchip_drm_fb_funcs = { > > .destroy = drm_gem_fb_destroy, > > @@ -112,6 +113,8 @@ rockchip_atomic_helper_commit_tail_rpm(struct drm_atomic_state *old_state) > > > > drm_atomic_helper_commit_modeset_disables(dev, old_state); > > > > + rockchip_drm_vop_gamma_set(old_state); > > + > > Instead of duplicating the commit_tail helper, could you just implement > .atomic_begin() and call this from there? I think the only hitch is if you > need this to be completed before crtc->atomic_enable(), at which point you > might need to call it from vop_crtc_atomic_enable() and then detect that in > atomic_begin() > I think moving this to .atomic_begin might be enough. Let me send a new series and we can see how that goes. Thanks for reviewing, Ezequiel