Received: by 2002:a5b:505:0:0:0:0:0 with SMTP id o5csp4462ybp; Tue, 8 Oct 2019 13:04:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqwde3F7mcuwAPo8wofZwd0Dcgh1YNyve/VCY9LjUJFVX0WknKB49wkIg7ylNs9zl7aHzv+D X-Received: by 2002:a17:906:1f57:: with SMTP id d23mr31122396ejk.103.1570565053113; Tue, 08 Oct 2019 13:04:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570565053; cv=none; d=google.com; s=arc-20160816; b=MUPqJJmLLtrjH97JJfXjIENrxDkJRmgYXEkeDyJFsRHAaVoVnFmhyeolA74b9eIwas UHM/rLW7myQwl9CEsBELF9U1SczzJkmzjwSIiuwnir4d6uS4Syh/Z/omTqcyBxkkjE+2 eo6MWhwmmG/KvuIfiHtvi/dF9qAfl/4WyizGCBXYUGxHi7ynnORstneWRToWk2x7bSwu HAbgpHaLC5K3gdj+of5frpDHo3iozJUIStzqaEx+ft6SftbE2lIsxNveQBxkuUDct03N Nn7ZUz5GJMkwLt6jbQj+SrbG+ZQNJaFmbCfqOJNSfwdBTcMUkoNqjFnqBwAgADh+CMxi vLkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=4CE1BxrYmt8bIJQ4ee/mv7sHVSkIz9neBXcllQM3bao=; b=i67qjkTnmgdUwB/6lxweKMIgbDU8BTKGIV6TF4cI3iSBggnGNQMTMideiZqVqbujVc 4f7POCVRfE5KytQJfIVaG5b2Feq3UEAZ6xJp6d3UZqrJA2OxOKvnaajNSy4ilb79+LmQ KKf9EOSXatdpz6sgGs50AWjMnoTQOtI0yCaKPHY9w3+YCo2PdxVug5EUFa9uxohiTGlz kRSAmUQunDSLiTxWCrHZrsG94MHHJN/v3qK7RGdhQgfeES7rWhclFRCciUlhAQl/o6AL pvo0tYVFreVgwV16larq9yaREJ4qNfWiTRVIA3gWKjkV9hq3crGccsA6P1zmfaSjmIiP CXsQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@poorly.run header.s=google header.b="UBp5dI6/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y43si50557edd.42.2019.10.08.13.03.48; Tue, 08 Oct 2019 13:04:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@poorly.run header.s=google header.b="UBp5dI6/"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730674AbfJHUDl (ORCPT + 99 others); Tue, 8 Oct 2019 16:03:41 -0400 Received: from mail-yw1-f66.google.com ([209.85.161.66]:38953 "EHLO mail-yw1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730410AbfJHUDl (ORCPT ); Tue, 8 Oct 2019 16:03:41 -0400 Received: by mail-yw1-f66.google.com with SMTP id n11so6895877ywn.6 for ; Tue, 08 Oct 2019 13:03:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=poorly.run; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=4CE1BxrYmt8bIJQ4ee/mv7sHVSkIz9neBXcllQM3bao=; b=UBp5dI6/eg+7xME26slfmNl99bWpkkf6SBDDeSqgT2/f7har5/CI1SF6tqgtOrxW/t IfvCN+hBCTQpIZF9DJh97Rlw5ZdpCQYiK+XnRcq8i1tn1sU0XyS+FlUlIdNMdN59t0Ky ZOCA7LcugGMWfPlYJ0INKOVVaRHSYD9+FCnzHxJP3NYVDQU8TR4qGjPeNp8prA1VN1Lf 9cMpkppFnDHSlEo6kJE1tox3bRFQ+SG3GhAzOXZTgqr+7zO4TrIftJc1wYsqcCFER43Z z6nvtZlJUwgYuFtC1Y6PDxHHJIPgb8qVdFLmjISYRBvmHX67DlZv7S01ESzvXnkAccEo Qoxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=4CE1BxrYmt8bIJQ4ee/mv7sHVSkIz9neBXcllQM3bao=; b=OjVcAuIYpQ0jNJibC3HmBZDgdUtfFfGIhS6KXn3yWTNIVzYVkrdoi8NWXNWmwirfb4 ik0eA00HGPkZ0L20a7rRA8njdUATrFeO/b9mOlnd+WXkOShZWCNU6NHTRi11Y6CFM3qe yPtcvktTYJRt9dq9nlhtVYHi7wgTtyrUzCquDTQatyLg9rfVnaXvsqfpfjqY83yNab31 UFKMgDPNi+XL1Ub5GUF4+NqKNgR1h67cv/w65F7e4P43b1K39ki2lob08PCnWfE6oE7R V6AzMAp3rIMvvZ3cWY3eXBH4X65aU8a2NWgLMBcaCeUDFiuO+cmv0muOraA/xscBcJry +3bQ== X-Gm-Message-State: APjAAAUuO1B8NrTkYgsbZoLHHJtn/v7E893dRZtH/wYYg7VhOXVVjvhd 3L+Jf0g6iAu02qP2i0CWLWMJaA== X-Received: by 2002:a81:4f0b:: with SMTP id d11mr71977ywb.109.1570565020219; Tue, 08 Oct 2019 13:03:40 -0700 (PDT) Received: from localhost ([2620:0:1013:11:89c6:2139:5435:371d]) by smtp.gmail.com with ESMTPSA id u67sm7785ywf.44.2019.10.08.13.03.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Oct 2019 13:03:39 -0700 (PDT) Date: Tue, 8 Oct 2019 16:03:39 -0400 From: Sean Paul To: Ezequiel Garcia Cc: Sean Paul , dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, Heiko =?iso-8859-1?Q?St=FCbner?= , Sandy Huang , kernel@collabora.com, Sean Paul , Boris Brezillon , Douglas Anderson , Jacopo Mondi , Ilia Mirkin , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jacopo Mondi Subject: Re: [PATCH v3 3/5] drm/rockchip: Add optional support for CRTC gamma LUT Message-ID: <20191008200339.GD85762@art_vandelay> References: <20190930222802.32088-1-ezequiel@collabora.com> <20190930222802.32088-4-ezequiel@collabora.com> <20191007185432.GG126146@art_vandelay> <9cdd23c20ed91d4c4654aaae27d8c3addfd9af3f.camel@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9cdd23c20ed91d4c4654aaae27d8c3addfd9af3f.camel@collabora.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 08, 2019 at 04:33:35PM -0300, Ezequiel Garcia wrote: > On Tue, 2019-10-08 at 16:23 -0300, Ezequiel Garcia wrote: > > Hello Sean, > > > > On Mon, 2019-10-07 at 14:54 -0400, Sean Paul wrote: > > > On Mon, Sep 30, 2019 at 07:28:00PM -0300, Ezequiel Garcia wrote: > > > > Add an optional CRTC gamma LUT support, and enable it on RK3288. > > > > This is currently enabled via a separate address resource, > > > > which needs to be specified in the devicetree. > > > > > > > > The address resource is required because on some SoCs, such as > > > > RK3288, the LUT address is after the MMU address, and the latter > > > > is supported by a different driver. This prevents the DRM driver > > > > from requesting an entire register space. > > > > > > > > The current implementation works for RGB 10-bit tables, as that > > > > is what seems to work on RK3288. > > > > > > > > Signed-off-by: Ezequiel Garcia > > > > Reviewed-by: Douglas Anderson > > > > Reviewed-by: Jacopo Mondi > > > > --- > > > > Changes from v2: > > > > * None. > > > > > > > > Changes from v1: > > > > * drop explicit linear LUT after finding a proper > > > > way to disable gamma correction. > > > > * avoid setting gamma is the CRTC is not active. > > > > * s/int/unsigned int as suggested by Jacopo. > > > > * only enable color management and set gamma size > > > > if gamma LUT is supported, suggested by Doug. > > > > * drop the reg-names usage, and instead just use indexed reg > > > > specifiers, suggested by Doug. > > > > > > > > Changes from RFC: > > > > * Request (an optional) address resource for the LUT. > > > > * Drop support for RK3399, which doesn't seem to work > > > > out of the box and needs more research. > > > > * Support pass-thru setting when GAMMA_LUT is NULL. > > > > * Add a check for the gamma size, as suggested by Ilia. > > > > * Move gamma setting to atomic_commit_tail, as pointed > > > > out by Jacopo/Laurent, is the correct way. > > > > --- > > > > drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 3 + > > > > drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 114 ++++++++++++++++++++ > > > > drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 7 ++ > > > > drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 2 + > > > > 4 files changed, 126 insertions(+) > > > > > > > > diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c > > > > index dba352ec0ee3..fd1d987698ab 100644 > > > > --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c > > > > +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c > > > > @@ -17,6 +17,7 @@ > > > > #include "rockchip_drm_drv.h" > > > > #include "rockchip_drm_fb.h" > > > > #include "rockchip_drm_gem.h" > > > > +#include "rockchip_drm_vop.h" > > > > > > > > static const struct drm_framebuffer_funcs rockchip_drm_fb_funcs = { > > > > .destroy = drm_gem_fb_destroy, > > > > @@ -112,6 +113,8 @@ rockchip_atomic_helper_commit_tail_rpm(struct drm_atomic_state *old_state) > > > > > > > > drm_atomic_helper_commit_modeset_disables(dev, old_state); > > > > > > > > + rockchip_drm_vop_gamma_set(old_state); > > > > + > > > > > > Instead of duplicating the commit_tail helper, could you just implement > > > .atomic_begin() and call this from there? I think the only hitch is if you > > > need this to be completed before crtc->atomic_enable(), at which point you > > > might need to call it from vop_crtc_atomic_enable() and then detect that in > > > atomic_begin() > > > > > > > I think moving this to .atomic_begin might be enough. Let me send a new > > series and we can see how that goes. > > > > Oh, before going forward, pleaste note that the first iteration > of this patch (as noted in the changelog) was applying the gamma lut > on .atomic_flush. However, Laurent and Jacopo pointed out that > it might add some tearing to do so, and that's why it was moved > to commit_tail. > > I have to admit I'm not too sure about the difference between > applying this gamma LUT on atomic_begin or atomic_flush, > perhaps you can clarify that? The only difference between what you have now and calling it in atomic_begin is that as you have it now, it's set before crtc->atomic_enable() is called. I think in order to address Ville's concerns on the other patch, you'll need to set it the lut in .atomic_enable() anyways, so here's what I would suggest: - Set the LUT in .atomic_enable() wherever it makes sense (you have it at the start now) - Add an .atomic_begin() implementation and check state->color_mgmt_changed and state->active_changed. color_mgmt_changed && !active_changed, set the lut - Remove patches 1 & 5 ...I think :-) Sean > > Thanks! > Ezequiel > > -- Sean Paul, Software Engineer, Google / Chromium OS