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[209.132.180.67]) by mx.google.com with ESMTP id e11si209010ejr.383.2019.10.08.16.48.32; Tue, 08 Oct 2019 16:48:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=I+N5hkvP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729924AbfJHXqO (ORCPT + 99 others); Tue, 8 Oct 2019 19:46:14 -0400 Received: from mail-io1-f67.google.com ([209.85.166.67]:36922 "EHLO mail-io1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729789AbfJHXqN (ORCPT ); Tue, 8 Oct 2019 19:46:13 -0400 Received: by mail-io1-f67.google.com with SMTP id b19so918858iob.4 for ; Tue, 08 Oct 2019 16:46:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=date:from:to:cc:subject:in-reply-to:message-id:references :user-agent:mime-version; bh=SPl3L4+4Zy9QlJN3K7IuqOc2JedlA0ldY7i+AP0Siqo=; b=I+N5hkvPCF8K1LY460NnH3Bs+ppv36e7pHAAko5cPGtVK7Q1xpMFtMk1sbwX3EL9Ae UX5ufwjfjE2WsQxxVvaJrkkGtrrD1A1swJroeZ6oWYFiFUD/gbGKkY6710T0F0X5S5Xo BF95rAFQKdDZy+9dBrgr05QKn2VguSytZtPaHPhpxauj1vAvK0o8UX1wBJzBZa1yl7EV jLHoqHF7Hse1l/Ohr1dGC6ATYWRzE6EftbRk42hoGB79bBRXmsmPeyS2gmRpO97jk05b X+CS58w6j5DGF3spjHV4AncNibrgaK8A9wTUdRqszmiSN3PwPwqQA/IsTfJ60gtOiuUB 4Xrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:in-reply-to:message-id :references:user-agent:mime-version; bh=SPl3L4+4Zy9QlJN3K7IuqOc2JedlA0ldY7i+AP0Siqo=; b=aboylJAZpAhdZep1lPPAvt7tRjhugbbWXs/vjHBd4QVV1+Gq0crfKD9wXuZ/I9idCu dHDJaI5s+uj/0wEZBloDckrFij1FGbZh/MwIeguxAHHKnI2TP6mtNvDAxkcQ1j60HLia aGnEzS5kk7DrnBIVlFMHQGvTYOslaOI6/XH712cYANp3JV8EBQwj6y9Bc9JrW5TXTMEh 7bupw78z8sqR6wqj8xF3VgNaqtsSgFVqV3ndHmYUFmk97+M4raeyoW+SOXacB3u7MkCu SYRdfsOiAyvAvktT7PRia01UvK1GBW/y6xEGZiVhKGVOdLAAEaBXs6zqIRQcAg62Pzk1 RVjQ== X-Gm-Message-State: APjAAAV1K+t6NFHnqLcHF0f0XZ148QDfSgcqZ/rQjDLbL+8tXnZE1lTr BZZ73Q/4cJ8zwOsdL3Sz6OUGGQ== X-Received: by 2002:a92:d084:: with SMTP id h4mr287013ilh.223.1570578372595; Tue, 08 Oct 2019 16:46:12 -0700 (PDT) Received: from localhost ([64.62.168.194]) by smtp.gmail.com with ESMTPSA id m11sm250603ioq.5.2019.10.08.16.46.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Oct 2019 16:46:12 -0700 (PDT) Date: Tue, 8 Oct 2019 16:46:06 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: Krzysztof Kozlowski cc: Rob Herring , Mark Rutland , Thierry Reding , =?ISO-8859-15?Q?Uwe_Kleine-K=F6nig?= , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-leds@vger.kernel.org, linux-pwm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: Re: [PATCH v3 1/2] dt-bindings: pwm: Convert PWM bindings to json-schema In-Reply-To: <20191002164047.14499-1-krzk@kernel.org> Message-ID: References: <20191002164047.14499-1-krzk@kernel.org> User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2 Oct 2019, Krzysztof Kozlowski wrote: > Convert generic PWM bindings to DT schema format using json-schema. The > consumer bindings are split to separate file. > > Signed-off-by: Krzysztof Kozlowski > > --- > [ ... ] > diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt > index 36447e3c9378..3d1dd7b06efc 100644 > --- a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt > +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt > @@ -17,7 +17,7 @@ Required properties: > Please refer to sifive-blocks-ip-versioning.txt for details. > - reg: physical base address and length of the controller's registers > - clocks: Should contain a clock identifier for the PWM's parent clock. > -- #pwm-cells: Should be 3. See pwm.txt in this directory > +- #pwm-cells: Should be 3. See pwm.yaml in this directory > for a description of the cell format. > - interrupts: one interrupt per PWM channel For the SiFive PWM driver documentation: Acked-by: Paul Walmsley - Paul