Received: by 2002:a5b:505:0:0:0:0:0 with SMTP id o5csp302579ybp; Tue, 8 Oct 2019 18:29:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqzVpg/HEdlnoS+TyK7hnjZ+TE1ksdgSd3ksQOIGAgJmJJ/mEDKcb+Hk2h085qAitNnaQpFS X-Received: by 2002:aa7:d807:: with SMTP id v7mr816962edq.220.1570584541103; Tue, 08 Oct 2019 18:29:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570584541; cv=none; d=google.com; s=arc-20160816; b=0hBKtRTDAYXZayAZovdkAaH7mfxXRKZ0XVExYDYYJ1SkQLWPiUQUXeaNpYDl9elu6+ S84I2wkR5fHzEQhxuUTL3xETJ8OqJfphL0YEY6u3LLxHloIJvOTugWMvlXpaTSipMFs/ fLtNQDNIo1v0S2HxC+s5uYJYHXJKScw9zkPxco2XW8aETeRysb3yot8K+S80YcQovC1Y GZoSaAEbuRjrnP7On+lVrKNQkKy1kbCjJfNj/4GaR3+JpfWHh6Ee78IafVSVYQewU65o liGVaKK5Y3V7Ui6kAE8HbmW+Dh71QSmq+X4ovIuyv6hXTlyaJZZ2HdbMx6ak7ArDZD39 p+9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=/1rArowlcljtWwQhWc6H62U9oia9BZBmJDRkv7/21fk=; b=IKBAOJa5us8inMKd+OQzo0lRVTW/KgrG/KBfHb9oG4Q5bKO/avuctq/Vx4LoEgwi0H ogPqylBwnDzKZ7TYtU5O+h1/beQw1W3RUAS6gcTb6XFrWJAj0EHDPZwKdr834aHFfXNd GAikmj5s8esAWYIIcRsfwXfD9CG99FD0fuWq1PI61hjxkyPdd2Z1LRe40aoH206t//kC dHBi1PUC6gvF9dKOCLH/G5iKJIgCZRpxy9A+gAeHRzy1dNis/Wy+/9MHxQDdyGodeRdU X2+VkrBnqk7JwyBn8DSGLIDACX/LdN6Pi8hwQ4EtVUpnkqDo2H+iJANxVn8HvF6mGImj D0Ug== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z6si402969edx.139.2019.10.08.18.28.37; Tue, 08 Oct 2019 18:29:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730168AbfJIB22 (ORCPT + 99 others); Tue, 8 Oct 2019 21:28:28 -0400 Received: from mga18.intel.com ([134.134.136.126]:22712 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729700AbfJIB21 (ORCPT ); Tue, 8 Oct 2019 21:28:27 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Oct 2019 18:28:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,273,1566889200"; d="scan'208";a="205597249" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by orsmga002.jf.intel.com with ESMTP; 08 Oct 2019 18:28:24 -0700 From: "Ramuthevar,Vadivel MuruganX" To: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, adrian.hunter@intel.com, ulf.hansson@linaro.org, michal.simek@xilinx.com, robh+dt@kernel.org, cheol.yong.kim@intel.com, qi-ming.wu@intel.com, Ramuthevar Vadivel Murugan Subject: [PATCH v2 1/2] dt-bindings: mmc: sdhci-of-arasan: Add new compatible for Intel LGM SDXC Date: Wed, 9 Oct 2019 09:28:17 +0800 Message-Id: <20191009012818.32763-2-vadivel.muruganx.ramuthevar@linux.intel.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20191009012818.32763-1-vadivel.muruganx.ramuthevar@linux.intel.com> References: <20191009012818.32763-1-vadivel.muruganx.ramuthevar@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ramuthevar Vadivel Murugan Add a new compatible to use the sdhc-arasan host controller driver with the SDXC PHY to support on Intel's Lightning Mountain(LGM) SoC. Signed-off-by: Ramuthevar Vadivel Murugan --- Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index 7ca0aa7ccc0b..eb78d9a28c8b 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -19,6 +19,8 @@ Required Properties: Note: This binding has been deprecated and moved to [5]. - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - "intel,lgm-sdhci-5.1-sdxc", "arasan,sdhci-5.1": Intel LGM SDXC PHY + For this device it is strongly suggested to include arasan,soc-ctl-syscon. [5] Documentation/devicetree/bindings/mmc/sdhci-am654.txt @@ -97,3 +99,18 @@ Example: phy-names = "phy_arasan"; arasan,soc-ctl-syscon = <&sysconf>; }; + + sdxc: sdhci@ec600000 { + compatible = "arasan,sdhci-5.1", "intel,lgm-sdhci-5.1-sdxc"; + reg = <0xec600000 0x300>; + interrupt-parent = <&ioapic1>; + interrupts = <43 1>; + clocks = <&cgu0 LGM_CLK_SDIO>, <&cgu0 LGM_CLK_NGI>, + <&cgu0 LGM_GCLK_SDXC>; + clock-names = "clk_xin", "clk_ahb", "gate"; + clock-output-names = "sdxc_cardclock"; + #clock-cells = <0>; + phys = <&sdxc_phy>; + phy-names = "phy_arasan"; + arasan,soc-ctl-syscon = <&sysconf>; + }; -- 2.11.0