Received: by 2002:a5b:505:0:0:0:0:0 with SMTP id o5csp360660ybp; Tue, 8 Oct 2019 19:44:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqy6//nCyLcw754FOLzOPXvq85JdmI6cOFfTLDfXTs8ZqfcCRkitxVUIWVFrs043xBDNvVuu X-Received: by 2002:a05:6402:656:: with SMTP id u22mr1017940edx.70.1570589091133; Tue, 08 Oct 2019 19:44:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570589091; cv=none; d=google.com; s=arc-20160816; b=Nk8hyPOI/mKdZKQDBQnh1QV60fcsBBNSFj3p5g7M23wqvrlDeh063EXJgA/D8zMtR5 FStVbbGOJmrl7M0+rAO0+NiAl/0r/skAIDL/u0xgQxYxqcXAsdGR291hohIGYvAf8Bjb dgh906yFXhv+I2ZBMqg8Rq//ol5C0JFdzUiuIf64kI6WEui7egzw5C4Q7TlPhhGM8Lil dCmYhhsu+jrXkWwVjuvVMGXSZ1me4u73DKBeR2hMbC8rzd67iM2ywtXdia8zv7QeQPZH QduHRLqU5EF7v2vC72He3Le0l39nMuRNYEzYRU1z1cI6cZTpwdj1wKDeBDRS10K4jCbw JDYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:dkim-signature:mime-version:references :in-reply-to:message-id:date:subject:cc:to:from; bh=kTsf7sroztlFU/WoIr8VZwOOWFzOV3Kid4dRXTVjZ4I=; b=BWzSWTa0QnDqSUx/lC/FbAXhVh0M0PSXohSGR8filW/w47xdNFHh55S5aW4JEYWTnj sA47i3MpYWFXenmjwF44NYcAtg/mS2EqaKLtkQxem9eKFfGqnpsXPSDkBZj76LYGuzbi W1dxNfKitT/QhBZwL/RpPTMbCeATu8dnBhJc6F9Gh9iJNZ1h7KNohFDm6LkPSC0kMHIW 4PDvFmOWUbdWt9Tmupdg4Je6fuj+djCeyoejAi8q43z+3bqavJ0D7qLA/LR4ErOuf8Ig kNmQvOjuKCi312wjZ0S01cq/c567ulg+tKZgrqwcY6NxkSYheypJ1NjudGEN9P7JRJmk CYcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=MEZOOrXe; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n3si636342edc.151.2019.10.08.19.44.28; Tue, 08 Oct 2019 19:44:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=MEZOOrXe; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730358AbfJICoI (ORCPT + 99 others); Tue, 8 Oct 2019 22:44:08 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:9161 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730314AbfJICoG (ORCPT ); Tue, 8 Oct 2019 22:44:06 -0400 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 08 Oct 2019 19:44:06 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 08 Oct 2019 19:44:05 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 08 Oct 2019 19:44:05 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 9 Oct 2019 02:44:05 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 9 Oct 2019 02:44:05 +0000 Received: from jckuo-lt.nvidia.com (Not Verified[10.19.101.249]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Tue, 08 Oct 2019 19:44:04 -0700 From: JC Kuo To: , , , CC: , , , , , JC Kuo Subject: [PATCH v4 5/5] arm64: tegra: Enable XUSB host in P2972-0000 board Date: Wed, 9 Oct 2019 10:43:43 +0800 Message-ID: <20191009024343.30218-6-jckuo@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191009024343.30218-1-jckuo@nvidia.com> References: <20191009024343.30218-1-jckuo@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1570589046; bh=kTsf7sroztlFU/WoIr8VZwOOWFzOV3Kid4dRXTVjZ4I=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=MEZOOrXeOmV/9xhDlP5QVwsvFovjvVRPt00phORF9fdDU3zRK5uNZ4FUiUwOgmey7 xsoEGUS1ATgppySZMWVgpAhNQldx3/vCgnEOWmqsnlGjL2ODvkgT41w9gjPGxhTb+p k8hxOHUJhIZ6sNOFTGTBb0PTE7++RnGMeDk5pgL81o+uTYx3eyqtlS5GpKwkNESixQ tgAF5uktzI9/Amxa1uVt0pPj1cIlsUPOqSSSB59YJ+eyCQ89MQhoHU1mA7/nEM+dXL lFaCbvqphyOwvyuEBiNd8afnxbgq+vBNFl0FK/7gRMv2Vd/J7qoZipkvtVWEe5IzYi XJ5rnC9Ea8S7A== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit enables XUSB host and pad controller in Tegra194 P2972-0000 board. Signed-off-by: JC Kuo --- Changes in v4: none Changes in v3: none Changes in v2: - use capitalization of regulator names - fix gpio property of VDD_5V_SATA regulator .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 36 ++++++++++- .../boot/dts/nvidia/tegra194-p2972-0000.dts | 62 +++++++++++++++++++ 2 files changed, 97 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi index 4c38426a6969..e7d5e8a30f93 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi @@ -66,6 +66,29 @@ vmmc-supply = <&vdd_emmc_3v3>; }; + padctl@3520000 { + avdd-usb-supply = <&vdd_usb_3v3>; + vclamp-usb-supply = <&vdd_1v8ao>; + + ports { + usb2-1 { + vbus-supply = <&vdd_5v0_sys>; + }; + + usb2-3 { + vbus-supply = <&vdd_5v_sata>; + }; + + usb3-0 { + vbus-supply = <&vdd_5v0_sys>; + }; + + usb3-3 { + vbus-supply = <&vdd_5v0_sys>; + }; + }; + }; + rtc@c2a0000 { status = "okay"; }; @@ -229,7 +252,7 @@ regulator-max-microvolt = <3300000>; }; - ldo5 { + vdd_usb_3v3: ldo5 { regulator-name = "VDD_USB_3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -313,5 +336,16 @@ regulator-boot-on; enable-active-low; }; + + vdd_5v_sata: regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + + regulator-name = "VDD_5V_SATA"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts index d47cd8c4dd24..b60eef64c487 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts @@ -62,6 +62,68 @@ GPIO_ACTIVE_LOW>; }; }; + padctl@3520000 { + status = "okay"; + + pads { + usb2 { + lanes { + usb2-1 { + status = "okay"; + }; + + usb2-3 { + status = "okay"; + }; + }; + }; + + usb3 { + lanes { + usb3-0 { + status = "okay"; + }; + + usb3-3 { + status = "okay"; + }; + }; + }; + }; + + ports { + usb2-1 { + mode = "host"; + status = "okay"; + }; + + usb2-3 { + mode = "host"; + status = "okay"; + }; + + usb3-0 { + nvidia,usb2-companion = <1>; + status = "okay"; + }; + + usb3-3 { + nvidia,usb2-companion = <3>; + nvidia,disable-gen2; + status = "okay"; + }; + }; + }; + + usb@3610000 { + status = "okay"; + + phys = <&{/cbb/padctl@3520000/pads/usb2/lanes/usb2-1}>, + <&{/cbb/padctl@3520000/pads/usb2/lanes/usb2-3}>, + <&{/cbb/padctl@3520000/pads/usb3/lanes/usb3-0}>, + <&{/cbb/padctl@3520000/pads/usb3/lanes/usb3-3}>; + phy-names = "usb2-1", "usb2-3", "usb3-0", "usb3-3"; + }; }; pcie@14100000 { -- 2.17.1