Received: by 2002:a5b:505:0:0:0:0:0 with SMTP id o5csp1203034ybp; Wed, 9 Oct 2019 10:17:37 -0700 (PDT) X-Google-Smtp-Source: APXvYqynkhwz1wVpj0Xz8QgHn6U19lV5l9sm5fVj7TeIFodX6PwzJOs+6k1xT+5mTf8B3Dn0QYxS X-Received: by 2002:a50:ed0b:: with SMTP id j11mr4088518eds.50.1570641457180; Wed, 09 Oct 2019 10:17:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570641457; cv=none; d=google.com; s=arc-20160816; b=hNYLpGEmDpLgn7ZTGsvz2vqNnx2CM89++ZrrKCqZdHODOcyksqroCAxciY8zlFgSYE Wr3i0XlSgVvNjYLwP6ivTPpRme7lht8vBx3OqToERw+HtzwDaW5LMeidu5uLhQElNWbp d+heL5uUsBSLgQsL1uJmVN2irQ470s/AAYfjeK0CVC9Ne0Lj4DHL8u2/NN1Gyvh+G0nl 7ZdmSVr+ccLbfYpgs1T1HI6lcLDvo420IXwMGY4Zh92B6rh8hnItu8iO95wtCWRFBOpV uRkSy3u23rjYqcvolA8fwCZTyyRHSC8fIagskCm2nu7yWkuCaPhEmXCdGc+zFf9/OMso JrCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OcaclkK5KBG5URnwd16/HyXejmEo8G/SfzG2Ua/RFEQ=; b=VtwRZQ5ANRMP9Sx3iouI9adByIABFe4WucACS8r7t52hDT/9PK8Cnka/T2M0XWwnSP L+EmdXheUDyaAFwLPF23UsbiqewniOxWpQFd1D2Ejvo/5pGCymIceIoQR55wf10kdUQD uhKprIO+Va0G1eNw5dbCLYapdVLIcB2+RUVPgm2DQbM4dVfYt+GAyzgD4x3Za3IfW0Bw 9LqpdnZN8i4aeoFnuHd/3z+123+2kt80T+sbc8EbTUV2G9iu8FD5yEkMepRZgnN2Zy3r wG6Ixk1rbmTsg0NLgJ+g9TwU72lg58QPxirpNb3sti4tuWfrcFpPqAxpq4nZolpbIa3u 4g1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=sTWj7AJn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o14si1452882ejc.405.2019.10.09.10.17.13; Wed, 09 Oct 2019 10:17:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=sTWj7AJn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731915AbfJIRPW (ORCPT + 99 others); Wed, 9 Oct 2019 13:15:22 -0400 Received: from mail-yb1-f193.google.com ([209.85.219.193]:44819 "EHLO mail-yb1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730490AbfJIRPR (ORCPT ); Wed, 9 Oct 2019 13:15:17 -0400 Received: by mail-yb1-f193.google.com with SMTP id v1so973169ybo.11; Wed, 09 Oct 2019 10:15:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OcaclkK5KBG5URnwd16/HyXejmEo8G/SfzG2Ua/RFEQ=; b=sTWj7AJn2W106Kv8e241Mqww3xJvvaXsFotF6PcB24k4QA5G/XLUXwy4OfP7Ltozfz t7VYP8hfSryPlD7xCdXlh7bKtHjhiYUKN7YNJdWZRcaw9DGovJnPy8zejdDQEhZcNLce m5F6U29t+wzinvfbAal2UfXjqfB394pNqx0IyyW63YJtLuXkNFBwlgeTjpuYWI9grs9l eOTFGdqXfylcnERtbgw4eKJfNS1/g91HBDOU/i9jRFwlW+9uybfsdJu7SzpGMlJINmP5 dSH4zJ4m5xPQttYzIDkbPwaT7bZm3TmMOMn3CEjthMQ+X1fnLs+7/GA6Me6p5+AuP0hq 2sIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OcaclkK5KBG5URnwd16/HyXejmEo8G/SfzG2Ua/RFEQ=; b=O8zgQrJZ1Tq7qwQkEXFlYN1gWHiNRISl95XuCULChKkE0fohLc5wY3pSNMEZ2L3XVX 3l4cFdK5JArME2RSYFzaRKU3Ui8LEVBrxxEdWFSd80AExvip+kUiVA3b+Zb5//pyyWGa s0/fDRidtpvettiWmZoHMzjilBwVyd40Ob1CQhmZaU+z7CtdKeChOaQdVddmzazOmtBn YaRN4RFhEoatxXrRXWVONpLx3SU4QbCAfaEzvFRAfgl1dA+AQ8sy7mdUERriHHJmUvWM i30Wm3zQkEHdpuNKXwCDnf6LYQixED1G1xAJCgtl1GzUA/j4c7RiERWGsJaftMCyL/tI AC2w== X-Gm-Message-State: APjAAAWVlEm+Y0Dd5BgpWm4aSqgxvSQC5VV6O5qfXIMIg6OPKdzcdSZP uHsBcWwNtm0+/uoKLa/5U3o= X-Received: by 2002:a25:b802:: with SMTP id v2mr2648868ybj.96.1570641316843; Wed, 09 Oct 2019 10:15:16 -0700 (PDT) Received: from localhost.localdomain (072-189-084-142.res.spectrum.com. [72.189.84.142]) by smtp.gmail.com with ESMTPSA id r63sm743292ywg.36.2019.10.09.10.15.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Oct 2019 10:15:16 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, akpm@linux-foundation.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, andriy.shevchenko@linux.intel.com, linux@rasmusvillemoes.dk, yamada.masahiro@socionext.com, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, geert@linux-m68k.org, preid@electromag.com.au, lukas@wunner.de, William Breathitt Gray Subject: [PATCH v18 03/14] gpio: 104-dio-48e: Utilize for_each_set_clump8 macro Date: Wed, 9 Oct 2019 13:14:39 -0400 Message-Id: <08b9c9a3e75ef1ab0d172223d10a1661f2b43fe2.1570641097.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Reviewed-by: Linus Walleij Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-dio-48e.c | 73 ++++++++++----------------------- 1 file changed, 21 insertions(+), 52 deletions(-) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index a44fa8af5b0d..977f0f6eb1ba 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -175,46 +175,25 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); - size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + unsigned long offset; + unsigned long gpio_mask; + unsigned int port_addr; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(dio48egpio->base + ports[i]); + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + port_addr = dio48egpio->base + ports[offset / 8]; + port_state = inb(port_addr) & gpio_mask; - /* store acquired bits at respective bits array offset */ - bits[word_index] |= (port_state << word_offset) & word_mask; + bitmap_set_value8(bits, port_state, offset); } return 0; @@ -244,37 +223,27 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; - unsigned int bitmask; + unsigned long offset; + unsigned long gpio_mask; + size_t index; + unsigned int port_addr; + unsigned long bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } + for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) { + index = offset / 8; + port_addr = dio48egpio->base + ports[index]; - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + bitmask = bitmap_get_value8(bits, offset) & gpio_mask; raw_spin_lock_irqsave(&dio48egpio->lock, flags); /* update output state data and set device gpio register */ - dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)]; - dio48egpio->out_state[port] |= bitmask; - outb(dio48egpio->out_state[port], dio48egpio->base + out_port); + dio48egpio->out_state[index] &= ~gpio_mask; + dio48egpio->out_state[index] |= bitmask; + outb(dio48egpio->out_state[index], port_addr); raw_spin_unlock_irqrestore(&dio48egpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.23.0