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[209.132.180.67]) by mx.google.com with ESMTP id m1si2256123edb.433.2019.10.09.17.52.02; Wed, 09 Oct 2019 17:52:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@aj.id.au header.s=fm3 header.b="MYi2/m18"; dkim=pass header.i=@messagingengine.com header.s=fm1 header.b=bM3KysDs; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732421AbfJJAv2 (ORCPT + 99 others); Wed, 9 Oct 2019 20:51:28 -0400 Received: from out2-smtp.messagingengine.com ([66.111.4.26]:43253 "EHLO out2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731166AbfJJAv2 (ORCPT ); Wed, 9 Oct 2019 20:51:28 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 2CAB221FAD; Wed, 9 Oct 2019 20:51:27 -0400 (EDT) Received: from imap2 ([10.202.2.52]) by compute4.internal (MEProxy); Wed, 09 Oct 2019 20:51:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h= mime-version:message-id:in-reply-to:references:date:from:to:cc :subject:content-type; s=fm3; bh=UBrk70WdLG+JMj8YlDV4YajtdEG1xvL hcNqIGJ2cU8M=; b=MYi2/m18XdE1IFiJ483sVOzoqKIuhhhEDG0ZJjF8vk8hT1K b3eMQqpoJeEGSOvYsq8ndGbjaTeZmJwJ6S5rolWplxp/l7IXjyOQbpeyBHGD17kn ps9cs7ABl+sz+pqgMNR10cl4w2eGuVaCD2Wi+AUxGlyfblfAFOizIlwrJtqwLHru r/h54Mjd4AfYQ2luKjUPMfE7GljihTw9opQnvgRXWck5nW7bD3U51zjRVur/SIMt Dcl9Ggd1PGb20DE201wgncIjv1VlDeKaKbzI4PU67ltqQf+nedcHp56r/QWzXFW3 uJIzsrfJL4VtFokPiyTLBpwOIhW7gB1zbT3Vy3g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=UBrk70 WdLG+JMj8YlDV4YajtdEG1xvLhcNqIGJ2cU8M=; b=bM3KysDsqBtVG/t5opV5qx Tku4sVJM6oQMimYpCGEZtegj+ccBY0/bqS3UAKZB5cI7cc9ygRfvuf2a7jPKdtF7 eKDbutSMjDuPIXT/Mjt0IVcaoj2fnoo86YyZWPEFMdzZx3KCRJIiWf6bivKFFN0I wgQc9fz0tkv+fjOkkSNo5kq+LeTztKM4WHR4UeF7Ni9CxeMH/5O5RdLxhHt8Msik /CU1IM6Y0rdVlswupIp+DtlzCEyVqj/L3VAeVqaFIsEj0H0AREvV1hfi/1UiRlp4 7HiWrhEBwzHDtGVG0DUtc+jP5yBOTzIMwqCKP2e667mXkAKSc0ZmGr24j0r45vuw == X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedufedriedvgdegudcutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenuc fjughrpefofgggkfgjfhffhffvufgtsehttdertderredtnecuhfhrohhmpedftehnughr vgifucflvghffhgvrhihfdcuoegrnhgurhgvfiesrghjrdhiugdrrghuqeenucfrrghrrg hmpehmrghilhhfrhhomheprghnughrvgifsegrjhdrihgurdgruhenucevlhhushhtvghr ufhiiigvpedt X-ME-Proxy: Received: by mailuser.nyi.internal (Postfix, from userid 501) id 9F2D1E00A5; Wed, 9 Oct 2019 20:51:22 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.1.7-360-g7dda896-fmstable-20191004v2 Mime-Version: 1.0 Message-Id: <18ac98e1-82b6-4782-bdfb-56765653e6df@www.fastmail.com> In-Reply-To: References: <20191008113523.13601-1-andrew@aj.id.au> <20191008113523.13601-2-andrew@aj.id.au> Date: Thu, 10 Oct 2019 11:22:17 +1030 From: "Andrew Jeffery" To: "Joel Stanley" Cc: linux-clk@vger.kernel.org, "Michael Turquette" , "Stephen Boyd" , "Rob Herring" , "Mark Rutland" , "Linux ARM" , linux-aspeed , "Linux Kernel Mailing List" , devicetree Subject: Re: [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 8 Oct 2019, at 23:07, Joel Stanley wrote: > On Tue, 8 Oct 2019 at 11:34, Andrew Jeffery wrote: > > > > The AST2500 has an explicit gate for the RMII RCLK for each of the two > > MACs. > > > > Signed-off-by: Andrew Jeffery > > --- > > include/dt-bindings/clock/aspeed-clock.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h > > index f43738607d77..64e245fb113f 100644 > > --- a/include/dt-bindings/clock/aspeed-clock.h > > +++ b/include/dt-bindings/clock/aspeed-clock.h > > @@ -39,6 +39,8 @@ > > #define ASPEED_CLK_BCLK 33 > > #define ASPEED_CLK_MPLL 34 > > #define ASPEED_CLK_24M 35 > > +#define ASPEED_CLK_GATE_MAC1RCLK 36 > > +#define ASPEED_CLK_GATE_MAC2RCLK 37 > > Calling these ASPEED_CLK_GATE breaks the pattern the rest of the > driver has in using that name for the clocks that are registered as > struct aspeed_clk_gate clocks. > > Do you think we should drop the GATE_ to match the existing clocks? I named them that way because the bits in question do just gate the clocks, but I've renamed them to keep the pattern. Will send a v2. Andrew