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From:   <Nicolas.Ferre@microchip.com>
To:     <alexandre.belloni@bootlin.com>
CC:     <Ludovic.Desroches@microchip.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] ARM: configs: at91: unselect PIT
Thread-Topic: [PATCH] ARM: configs: at91: unselect PIT
Thread-Index: AQHVftqQAUV07MlkkU2jYG8NKWK1+adTkCOA
Date:   Thu, 10 Oct 2019 08:44:33 +0000
Message-ID: <7d1be31b-dde0-d42b-745e-a83585ac379b@microchip.com>
References: <20191009194814.15034-1-alexandre.belloni@bootlin.com>
In-Reply-To: <20191009194814.15034-1-alexandre.belloni@bootlin.com>
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On 09/10/2019 at 21:48, Alexandre Belloni wrote:

> The PIT is not required anymore to successfully boot and may actually har=
m
> in case preempt-rt is used because the PIT interrupt is shared.
> Disable it so the TCB clocksource is used.
>=20
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>

> ---
>   arch/arm/configs/at91_dt_defconfig | 1 +
>   arch/arm/configs/sama5_defconfig   | 1 +
>   2 files changed, 2 insertions(+)
>=20
> diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_d=
t_defconfig
> index 63d09e61b6dc..7e5ffdab47da 100644
> --- a/arch/arm/configs/at91_dt_defconfig
> +++ b/arch/arm/configs/at91_dt_defconfig
> @@ -18,6 +18,7 @@ CONFIG_ARCH_MULTI_V5=3Dy
>   CONFIG_ARCH_AT91=3Dy
>   CONFIG_SOC_AT91RM9200=3Dy
>   CONFIG_SOC_AT91SAM9=3Dy
> +# CONFIG_ATMEL_CLOCKSOURCE_PIT is not set
>   CONFIG_AEABI=3Dy
>   CONFIG_UACCESS_WITH_MEMCPY=3Dy
>   CONFIG_ZBOOT_ROM_TEXT=3D0x0
> diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_de=
fconfig
> index 7255709d46ea..ee7db6cedaa6 100644
> --- a/arch/arm/configs/sama5_defconfig
> +++ b/arch/arm/configs/sama5_defconfig
> @@ -20,6 +20,7 @@ CONFIG_ARCH_AT91=3Dy
>   CONFIG_SOC_SAMA5D2=3Dy
>   CONFIG_SOC_SAMA5D3=3Dy
>   CONFIG_SOC_SAMA5D4=3Dy
> +# CONFIG_ATMEL_CLOCKSOURCE_PIT is not set
>   CONFIG_AEABI=3Dy
>   CONFIG_UACCESS_WITH_MEMCPY=3Dy
>   CONFIG_ZBOOT_ROM_TEXT=3D0x0
>=20


--=20
Nicolas Ferre