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[209.85.221.45]) by smtp.gmail.com with ESMTPSA id v6sm655314eja.90.2019.10.10.03.09.19 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 10 Oct 2019 03:09:20 -0700 (PDT) Received: by mail-wr1-f45.google.com with SMTP id p14so7131521wro.4 for ; Thu, 10 Oct 2019 03:09:19 -0700 (PDT) X-Received: by 2002:adf:fc42:: with SMTP id e2mr8275718wrs.100.1570702158960; Thu, 10 Oct 2019 03:09:18 -0700 (PDT) MIME-Version: 1.0 References: <20191010075004.192818-1-tfiga@chromium.org> In-Reply-To: From: Tomasz Figa Date: Thu, 10 Oct 2019 19:09:06 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] usb: mtk-xhci: Set the XHCI_NO_64BIT_SUPPORT quirk To: Nicolas Boichat Cc: linux-usb@vger.kernel.org, Mathias Nyman , Greg Kroah-Hartman , Matthias Brugger , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" , open list , Chunfeng Yun , Changqi Hu , Shik Chen Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 10, 2019 at 6:37 PM Nicolas Boichat wrote: > > On Thu, Oct 10, 2019 at 5:11 PM Tomasz Figa wrote: > > > > On Thu, Oct 10, 2019 at 6:08 PM Nicolas Boichat wrote: > > > > > > On Thu, Oct 10, 2019 at 3:50 PM Tomasz Figa wrote: > > > > > > > > MediaTek XHCI host controller does not support 64-bit addressing despite > > > > the AC64 bit of HCCPARAMS1 register being set. The platform-specific > > > > glue sets the DMA mask to 32 bits on its own, but it has no effect, > > > > because xhci_gen_setup() overrides it according to hardware > > > > capabilities. > > > > > > > > Use the XHCI_NO_64BIT_SUPPORT quirk to tell the XHCI core to force > > > > 32-bit DMA mask instead. > > > > > > > > Signed-off-by: Tomasz Figa > > > > > > Can we add a Fixes: tag for stable backports? > > > (after addressing the other comments of course) > > > > > > > The problem with Fixes: is that this patch depends on the quirk being > > there, but the offending code was merged earlier. Do you know how to > > handle such cases? > > Oh, interesting. I think this is documented here: > https://github.com/torvalds/linux/blob/master/Documentation/process/stable-kernel-rules.rst > > Something like this: > Cc: # 3.3.x: a1f84a3: sched: Check for idle > Cc: # 3.3.x > > (Where 3.3.x is the first release that contains the commit indicated > in the Fixes tag) > > Try that, worst case you'll get automated emails from stable > maintainers asking you how to fix the issue. > Oh, great, thanks a lot! Best regards, Tomasz > > > > > > > > > --- > > > > drivers/usb/host/xhci-mtk.c | 10 +++++----- > > > > 1 file changed, 5 insertions(+), 5 deletions(-) > > > > > > > > diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c > > > > index b18a6baef204a..4d101d52cc11b 100644 > > > > --- a/drivers/usb/host/xhci-mtk.c > > > > +++ b/drivers/usb/host/xhci-mtk.c > > > > @@ -395,6 +395,11 @@ static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci) > > > > xhci->quirks |= XHCI_SPURIOUS_SUCCESS; > > > > if (mtk->lpm_support) > > > > xhci->quirks |= XHCI_LPM_SUPPORT; > > > > + /* > > > > + * MTK host controller does not support 64-bit addressing, despite > > > > + * having the AC64 bit of the HCCPARAMS1 register set. > > > > + */ > > > > + xhci->quirks |= XHCI_NO_64BIT_SUPPORT; > > > > } > > > > > > > > /* called during probe() after chip reset completes */ > > > > @@ -488,11 +493,6 @@ static int xhci_mtk_probe(struct platform_device *pdev) > > > > goto disable_clk; > > > > } > > > > > > > > - /* Initialize dma_mask and coherent_dma_mask to 32-bits */ > > > > - ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); > > > > - if (ret) > > > > - goto disable_clk; > > > > - > > > > hcd = usb_create_hcd(driver, dev, dev_name(dev)); > > > > if (!hcd) { > > > > ret = -ENOMEM; > > > > -- > > > > 2.23.0.581.g78d2f28ef7-goog > > > >