Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Date:   Fri, 11 Oct 2019 11:39:39 -0700
From:   Bjorn Andersson <bjorn.andersson@linaro.org>
To:     Chris Lew <clew@codeaurora.org>
Cc:     andy.gross@linaro.org, david.brown@linaro.org,
        aneela@codeaurora.org, linux-arm-msm@vger.kernel.org,
        linux-soc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] rpmsg: glink: Set tail pointer to 0 at end of FIFO
Message-ID: <20191011183939.GA30457@tuxbook-pro>
References: <1530148797-31904-1-git-send-email-clew@codeaurora.org>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <1530148797-31904-1-git-send-email-clew@codeaurora.org>
User-Agent: Mutt/1.12.1 (2019-06-15)
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On Wed 27 Jun 18:19 PDT 2018, Chris Lew wrote:

> When wrapping around the FIFO, the remote expects the tail pointer to
> be reset to 0 on the edge case where the tail equals the FIFO length.
> 

Applied

Thanks,
Bjorn

> Signed-off-by: Chris Lew <clew@codeaurora.org>
> ---
>  drivers/rpmsg/qcom_glink_smem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c
> index 2b5cf2790954..7a276be598d6 100644
> --- a/drivers/rpmsg/qcom_glink_smem.c
> +++ b/drivers/rpmsg/qcom_glink_smem.c
> @@ -109,7 +109,7 @@ static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
>  	tail = le32_to_cpu(*pipe->tail);
>  
>  	tail += count;
> -	if (tail > pipe->native.length)
> +	if (tail >= pipe->native.length)
>  		tail -= pipe->native.length;
>  
>  	*pipe->tail = cpu_to_le32(tail);
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>