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Mon, 14 Oct 2019 11:58:03 +0000 Received: from MN2PR18MB3408.namprd18.prod.outlook.com ([fe80::d16d:8855:c030:2763]) by MN2PR18MB3408.namprd18.prod.outlook.com ([fe80::d16d:8855:c030:2763%3]) with mapi id 15.20.2347.023; Mon, 14 Oct 2019 11:58:03 +0000 From: Robert Richter To: Mauro Carvalho Chehab CC: Borislav Petkov , Tony Luck , "James Morse" , "linux-edac@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH 14/19] EDAC, mc: Create new function edac_inc_csrow() Thread-Topic: [PATCH 14/19] EDAC, mc: Create new function edac_inc_csrow() Thread-Index: AQHVf6jd4a7gKhx+NUm64guphBxEUKdVSRWAgATE1YA= Date: Mon, 14 Oct 2019 11:58:03 +0000 Message-ID: <20191014115757.fajnqzsn35qgqu7w@rric.localdomain> References: <20191010202418.25098-1-rrichter@marvell.com> <20191010202418.25098-15-rrichter@marvell.com> <20191011080825.74932496@coco.lan> In-Reply-To: <20191011080825.74932496@coco.lan> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HE1PR05CA0308.eurprd05.prod.outlook.com (2603:10a6:7:93::39) To MN2PR18MB3408.namprd18.prod.outlook.com (2603:10b6:208:165::10) x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [31.208.96.227] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: b8eadad6-96c8-42ab-a652-08d7509dc46f x-ms-traffictypediagnostic: MN2PR18MB3264: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; 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charset="us-ascii" Content-ID: <6D4B9BF5AFBA434AA489F5C45754CDC7@namprd18.prod.outlook.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: b8eadad6-96c8-42ab-a652-08d7509dc46f X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Oct 2019 11:58:03.3892 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: WT9mGXpna7LGPdUErC2Vbt26dXGfZINaXDuluVL1RIcvYCfD1n1pFr60jpoJFdTk0fAZtzDQsx06ON+injpbvw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR18MB3264 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-14_07:2019-10-11,2019-10-14 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11.10.19 08:08:25, Mauro Carvalho Chehab wrote: > Em Thu, 10 Oct 2019 20:25:33 +0000 > Robert Richter escreveu: >=20 > > Have a separate function to count errors in csrow/channel. This better > > separates code and reduces the indentation level. No functional > > changes. >=20 > This one assumes patch 06/19, with I'm not sure if it is correct. See also my answer there, the driver should still work as you expect it even with patch #6 applied. This patch is important to isolate the csrow handling that makes the code much better understandable and readable. I hope there are no concerns to this patch. Thank you for review. -Robert >=20 > >=20 > > Signed-off-by: Robert Richter > > --- > > drivers/edac/edac_mc.c | 40 +++++++++++++++++++++++++--------------- > > 1 file changed, 25 insertions(+), 15 deletions(-) > >=20 > > diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c > > index 9e8c5716a8c0..3779204c0e21 100644 > > --- a/drivers/edac/edac_mc.c > > +++ b/drivers/edac/edac_mc.c > > @@ -1045,6 +1045,26 @@ static struct mem_ctl_info *error_desc_to_mci(st= ruct edac_raw_error_desc *e) > > return container_of(e, struct mem_ctl_info, error_desc); > > } > > =20 > > +static void edac_inc_csrow(struct edac_raw_error_desc *e, int row, int= chan) > > +{ > > + struct mem_ctl_info *mci =3D error_desc_to_mci(e); > > + u16 count =3D e->error_count; > > + enum hw_event_mc_err_type type =3D e->type; > > + > > + if (row < 0) > > + return; > > + > > + edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan); > > + > > + if (type =3D=3D HW_EVENT_ERR_CORRECTED) { > > + mci->csrows[row]->ce_count +=3D count; > > + if (chan >=3D 0) > > + mci->csrows[row]->channels[chan]->ce_count +=3D count; > > + } else { > > + mci->csrows[row]->ue_count +=3D count; > > + } > > +} > > + > > void edac_raw_mc_handle_error(struct edac_raw_error_desc *e, > > struct dimm_info *dimm) > > { > > @@ -1201,22 +1221,12 @@ void edac_mc_handle_error(const enum hw_event_m= c_err_type type, > > chan =3D -2; > > } > > =20 > > - if (any_memory) { > > + if (any_memory) > > strcpy(e->label, "any memory"); > > - } else { > > - edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan); > > - if (p =3D=3D e->label) > > - strcpy(e->label, "unknown memory"); > > - if (type =3D=3D HW_EVENT_ERR_CORRECTED) { > > - if (row >=3D 0) { > > - mci->csrows[row]->ce_count +=3D error_count; > > - if (chan >=3D 0) > > - mci->csrows[row]->channels[chan]->ce_count +=3D error_count; > > - } > > - } else > > - if (row >=3D 0) > > - mci->csrows[row]->ue_count +=3D error_count; > > - } > > + else if (!*e->label) > > + strcpy(e->label, "unknown memory"); > > + > > + edac_inc_csrow(e, row, chan); > > =20 > > /* Fill the RAM location data */ > > p =3D e->location; >=20 >=20 >=20 > Thanks, > Mauro