Received: by 2002:a5b:505:0:0:0:0:0 with SMTP id o5csp4760505ybp; Mon, 14 Oct 2019 09:35:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqwccDLdOdcu5owce19luKo9Dn9YL754noqQ0u64JrgJbZzulSoHSo/E03xexJwEjnFLkkzr X-Received: by 2002:aa7:d748:: with SMTP id a8mr28574547eds.269.1571070938636; Mon, 14 Oct 2019 09:35:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571070938; cv=none; d=google.com; s=arc-20160816; b=KIa/04kp70EPLuChMuLMcIXZx+YBqtW0CIelgAwKsq2DRSPZCcVu9fypk5Tby79AeN oPg6svCmUYHBVNlkqZJGSPkDR5r4CdiVuQkIsOmL9TkseVW77BCJWshqnOuMkE3Zw1eY SIb1HmC7wiOIk/ZwKed6nMDF+Y1zVrHUEBRun1ad7d7ywyy0E4NMsx6ZHXO26x7qUGK3 vIdSs4rjA1Ddg3954F3jdcTgU/wfndfrx4hUbLAzZQTF12lmxEI6Xluw4mmd6XF2SsWN qHU5vYKTQcW8NucK903LX0heRs33P3+WHVKtj0BD8Lj3YYammv9noDgi+1jci/UwJYyz 1cRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version; bh=YhZmTuECyvNatPuwMHw4UrCLmojj7sz6D63jp3de7MU=; b=sjARbtWQjdoLurcPLbn+/N89dEnf1PzCTk5pxsjNykLqUcMKA5+jVhGAHnuMTtjqTQ toiGoPF23gM2GW1z5gVZR/gFlt8tcIdAvNTDeoaGOpheVDnJTQu5g/APW5gdyd51HAqU 2AyjrXZa+yZAFWyeHDW1RhEbaP/w1BjW4n/EeymggFt8Ucy/jaoTAaJTHfRwqnsfe6XO qIaE6vjaKy+8F5OR6hdcR7NAhewHZ/s34ccgkZlge7a+GBAca1pXGvVd1ZJhN8ii8nC0 DtbCJ1VPEhoxkch6otZI8vihCirQoEV791k3RrcU3zNgKkbLhkZ5KNv1i8R00sO+e1yw NVpg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f45si12365896edb.166.2019.10.14.09.35.15; Mon, 14 Oct 2019 09:35:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732264AbfJNP7A (ORCPT + 99 others); Mon, 14 Oct 2019 11:59:00 -0400 Received: from mail-vs1-f66.google.com ([209.85.217.66]:42957 "EHLO mail-vs1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731960AbfJNP7A (ORCPT ); Mon, 14 Oct 2019 11:59:00 -0400 Received: by mail-vs1-f66.google.com with SMTP id m22so11110389vsl.9 for ; Mon, 14 Oct 2019 08:59:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=YhZmTuECyvNatPuwMHw4UrCLmojj7sz6D63jp3de7MU=; b=cn9bii7r/yhIBkbkP7/fp4o6xUMkh3cGnr1j9tpAr6Mjn20QzZfV5DjizDBY9UqFaq W4un88SuqUHR5NUP00VPS7kHZPFVlbAekKT57mMYmIdlHj9y3N3pqi+JnLxL1+wO/DD9 RtwxsIRCJtjhFDdmt/6p2C6/lnwopcnyXd+FH1Z84+a3a4sF6hROfGoTiy0J+/aedQqh X1QjxJ2NjzmvPruaHGrZqZRHg86dvQf8vmwgOOmhxohAPHgA6NEvk5b2nmFWq5qJJzJX 6TsAaanfHkBLvMYxYjdpGn+5OUyMr8efQUQC2a3tlA5x+T6CMbV/i8WUBsa0y2o65/IP c+dQ== X-Gm-Message-State: APjAAAUctm7vii3xK7DO2lVjK6iQFT1h5wp/MPzKLbW9uHJFI5diop9/ SY447yMWxxpS3mnIUv7VXGfwj8Xw1LDz4jMZItM= X-Received: by 2002:a05:6102:253:: with SMTP id a19mr17354178vsq.37.1571068739538; Mon, 14 Oct 2019 08:58:59 -0700 (PDT) MIME-Version: 1.0 References: <20191011054240.17782-1-james.qian.wang@arm.com> <20191011054240.17782-2-james.qian.wang@arm.com> In-Reply-To: <20191011054240.17782-2-james.qian.wang@arm.com> From: Ilia Mirkin Date: Mon, 14 Oct 2019 11:58:48 -0400 Message-ID: Subject: Re: [PATCH v2 1/4] drm/komeda: Add a new helper drm_color_ctm_s31_32_to_qm_n() To: "james qian wang (Arm Technology China)" Cc: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "Jonathan Chai (Arm Technology China)" , "Julien Yin (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , Ayan Halder , "Tiannan Zhu (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , nd , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Ben Davis , "Oscar Zhang (Arm Technology China)" , "Channing Chen (Arm Technology China)" , Mihail Atanassov Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 11, 2019 at 1:43 AM james qian wang (Arm Technology China) wrote: > > Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to > convert S31.32 sign-magnitude to Qm.n 2's complement that supported by > hardware. > > Signed-off-by: james qian wang (Arm Technology China) > --- > drivers/gpu/drm/drm_color_mgmt.c | 23 +++++++++++++++++++++++ > include/drm/drm_color_mgmt.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c > index 4ce5c6d8de99..3d533d0b45af 100644 > --- a/drivers/gpu/drm/drm_color_mgmt.c > +++ b/drivers/gpu/drm/drm_color_mgmt.c > @@ -132,6 +132,29 @@ uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision) > } > EXPORT_SYMBOL(drm_color_lut_extract); > > +/** > + * drm_color_ctm_s31_32_to_qm_n > + * > + * @user_input: input value > + * @m: number of integer bits Is this the full 2's complement value? i.e. including the "sign" bit of the 2's complement representation? I'd kinda assume that m = 32, n = 0 would just get me the integer portion of this, for example. > + * @n: number of fractinal bits fractional > + * > + * Convert and clamp S31.32 sign-magnitude to Qm.n 2's complement. > + */ > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n) > +{ > + u64 mag = (user_input & ~BIT_ULL(63)) >> (32 - n); > + bool negative = !!(user_input & BIT_ULL(63)); > + s64 val; > + > + /* the range of signed 2s complement is [-2^n+m, 2^n+m - 1] */ This implies that n = 32, m = 0 would actually yield a 33-bit 2's complement number. Is that what you meant? > + val = clamp_val(mag, 0, negative ? BIT(n + m) : BIT(n + m) - 1); I'm going to play with numpy to convince myself that this is right (esp with the endpoints), but in the meanwhile, you probably want to use BIT_ULL in case n + m > 32 (I don't think that's the case with any current hardware though). > + > + return negative ? 0ll - val : val; Why not just "negative ? -val : val"? > +} > +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n); > + > /** > * drm_crtc_enable_color_mgmt - enable color management properties > * @crtc: DRM CRTC > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h > index d1c662d92ab7..60fea5501886 100644 > --- a/include/drm/drm_color_mgmt.h > +++ b/include/drm/drm_color_mgmt.h > @@ -30,6 +30,8 @@ struct drm_crtc; > struct drm_plane; > > uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precision); > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n); > > void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, > uint degamma_lut_size, > -- > 2.20.1 >