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[209.132.180.67]) by mx.google.com with ESMTP id w5si13383036eds.179.2019.10.15.04.53.13; Tue, 15 Oct 2019 04:53:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731436AbfJOKtR (ORCPT + 99 others); Tue, 15 Oct 2019 06:49:17 -0400 Received: from foss.arm.com ([217.140.110.172]:35180 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731402AbfJOKtO (ORCPT ); Tue, 15 Oct 2019 06:49:14 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 43A6C28; Tue, 15 Oct 2019 03:49:14 -0700 (PDT) Received: from entos-d05.shanghai.arm.com (entos-d05.shanghai.arm.com [10.169.40.35]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7ADA43F68E; Tue, 15 Oct 2019 03:49:09 -0700 (PDT) From: Jianyong Wu To: netdev@vger.kernel.org, yangbo.lu@nxp.com, john.stultz@linaro.org, tglx@linutronix.de, pbonzini@redhat.com, sean.j.christopherson@intel.com, maz@kernel.org, richardcochran@gmail.com, Mark.Rutland@arm.com, will@kernel.org, suzuki.poulose@arm.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Steve.Capper@arm.com, Kaly.Xin@arm.com, justin.he@arm.com, jianyong.wu@arm.com, nd@arm.com Subject: [PATCH v5 4/6] psci: Add hvc call service for ptp_kvm. Date: Tue, 15 Oct 2019 18:48:20 +0800 Message-Id: <20191015104822.13890-5-jianyong.wu@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191015104822.13890-1-jianyong.wu@arm.com> References: <20191015104822.13890-1-jianyong.wu@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch is the base of ptp_kvm for arm64. ptp_kvm modules will call hvc to get this service. The service offers real time and counter cycle of host for guest. Signed-off-by: Jianyong Wu --- drivers/clocksource/arm_arch_timer.c | 5 +++++ include/clocksource/arm_arch_timer.h | 5 +++++ include/linux/arm-smccc.h | 12 ++++++++++++ virt/kvm/arm/psci.c | 21 +++++++++++++++++++++ 4 files changed, 43 insertions(+) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 07e57a49d1e8..3597f1f27b10 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1634,3 +1634,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) } TIMER_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init); #endif + +bool is_arm_arch_counter(void *cs) +{ + return (struct clocksource *)cs == &clocksource_counter; +} diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 1d68d5613dae..5895d10a6148 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -86,6 +86,7 @@ extern u32 arch_timer_get_rate(void); extern u64 (*arch_timer_read_counter)(void); extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void); extern bool arch_timer_evtstrm_available(void); +extern bool is_arm_arch_counter(void *); #else @@ -104,6 +105,10 @@ static inline bool arch_timer_evtstrm_available(void) return false; } +bool is_arm_arch_counter(void *unuse) +{ + return false; +} #endif #endif diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index a6e4d3e3d10a..bc0cdad10f35 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -94,6 +94,7 @@ /* KVM "vendor specific" services */ #define ARM_SMCCC_KVM_FUNC_FEATURES 0 +#define ARM_SMCCC_KVM_PTP 1 #define ARM_SMCCC_KVM_FUNC_FEATURES_2 127 #define ARM_SMCCC_KVM_NUM_FUNCS 128 @@ -103,6 +104,17 @@ ARM_SMCCC_OWNER_VENDOR_HYP, \ ARM_SMCCC_KVM_FUNC_FEATURES) +/* + * This ID used for virtual ptp kvm clock and it will pass second value + * and nanosecond value of host real time and system counter by vcpu + * register to guest. + */ +#define ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ + ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_VENDOR_HYP, \ + ARM_SMCCC_KVM_PTP) + #ifndef __ASSEMBLY__ #include diff --git a/virt/kvm/arm/psci.c b/virt/kvm/arm/psci.c index 0debf49bf259..f0ef388ebbfa 100644 --- a/virt/kvm/arm/psci.c +++ b/virt/kvm/arm/psci.c @@ -392,6 +392,8 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) u32 func_id = smccc_get_function(vcpu); u32 val[4] = {}; u32 option; + u64 cycles; + struct system_time_snapshot systime_snapshot; val[0] = SMCCC_RET_NOT_SUPPORTED; @@ -431,6 +433,25 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu) case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID: val[0] = BIT(ARM_SMCCC_KVM_FUNC_FEATURES); break; + /* + * This will used for virtual ptp kvm clock. three + * values will be passed back. + * reg0 stores high 32-bit host ktime; + * reg1 stores low 32-bit host ktime; + * reg2 stores high 32-bit difference of host cycles and cntvoff; + * reg3 stores low 32-bit difference of host cycles and cntvoff. + */ + case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: + ktime_get_snapshot(&systime_snapshot); + if (!is_arm_arch_counter(systime_snapshot.sc.cs)) + return kvm_psci_call(vcpu); + val[0] = systime_snapshot.real >> 32; + val[1] = systime_snapshot.real << 32 >> 32; + cycles = systime_snapshot.sc.cycles - + vcpu_vtimer(vcpu)->cntvoff; + val[2] = cycles >> 32; + val[3] = cycles << 32 >> 32; + break; default: return kvm_psci_call(vcpu); } -- 2.17.1