Received: by 2002:a5b:505:0:0:0:0:0 with SMTP id o5csp5795905ybp; Tue, 15 Oct 2019 05:17:13 -0700 (PDT) X-Google-Smtp-Source: APXvYqyY3j+Gm8Mr1xB5w8ItAuM7SLJA4RMHrp7nKsLt5+i2OuNN1eFPw0Gvh8kzLw4dtS4UXRL4 X-Received: by 2002:aa7:c890:: with SMTP id p16mr12037194eds.296.1571141833675; Tue, 15 Oct 2019 05:17:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571141833; cv=none; d=google.com; s=arc-20160816; b=v9LGssTB6PIsevjvqKCwXDwSEsYIXnL4/MiK9q+lrBUc3AWkOm9jxno6I47u+1RLM/ c2ZP9hgEH0PZbUFk4U3bAKjRO05fOGaIrTOHIQiYhIOeWA097gq3P+dVvmwMZgkEXku6 qPJ6q966pBvzLo/Jfeph/K4XZQvwPa6xff4XTj0YttIsXC2Dv1O8sFiAe5yk4PmI5Yvq 7lRo3HrfUeq63GgrIo7JLOCbsAwJaM4RcyfC3kOtu8wKz8AwVRxkL1Nrnjqx7r1I6Oak tUEtrqKCHPxhmN7fxMvtg51eTvoR2xtLZKmb0FmOswcqqXdWx3wjS51y0rPdOxLPdXm+ ZHeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=1vLMD8TmyVCWXoCLC0SpjyhAksMSF3DdHLuUmDdD75E=; b=wKMouDLeANA6yMrbBJnD8UQ+wJ1YR30oY7khnfu35w35dqMyMb13aRqs9t53M+yCBo O1Kr9hEcacsLfCabTJWdCU1bRg8ChJzcH7TAejrPDt/GDpGLxD8bOdUGXAY8swlKePu/ GHFA/Oe3VXFKG8z63W/ju3gta98GDmxNgh6WeLwXoEgwEZgmXxNXat9hJ3ZYPfy9lAPn aGQIwURSq07MliNGgG2RIoflNPUd9zuIO2rAvd1SmZOQC8fW9SHp+PEki2iy23G8ORO2 XWBiQgYVapREpUM99+mAqBM2lKCEhtwvmAGucu5KV8VC7xe+vRZD7wwtuw1Jdp6HeZ53 Bp8w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l12si16766157edk.444.2019.10.15.05.16.50; Tue, 15 Oct 2019 05:17:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729342AbfJOLqr (ORCPT + 99 others); Tue, 15 Oct 2019 07:46:47 -0400 Received: from 8bytes.org ([81.169.241.247]:47502 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726208AbfJOLqp (ORCPT ); Tue, 15 Oct 2019 07:46:45 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id AC4752D9; Tue, 15 Oct 2019 13:46:43 +0200 (CEST) Date: Tue, 15 Oct 2019 13:46:42 +0200 From: Joerg Roedel To: Bjorn Helgaas Cc: Kuppuswamy Sathyanarayanan , David Woodhouse , Ashok Raj , Keith Busch , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Bjorn Helgaas Subject: Re: [PATCH 0/2] iommu/vt-d: Select PCI_PRI for INTEL_IOMMU_SVM Message-ID: <20191015114642.GL14518@8bytes.org> References: <20191009224551.179497-1-helgaas@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191009224551.179497-1-helgaas@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hey Bjorn, On Wed, Oct 09, 2019 at 05:45:49PM -0500, Bjorn Helgaas wrote: > From: Bjorn Helgaas > > I think intel-iommu.c depends on CONFIG_AMD_IOMMU in an undesirable way: > > When CONFIG_INTEL_IOMMU_SVM=y, iommu_enable_dev_iotlb() calls PRI > interfaces (pci_reset_pri() and pci_enable_pri()), but those are only > implemented when CONFIG_PCI_PRI is enabled. If CONFIG_PCI_PRI is not > enabled, there are stubs that just return failure. > > The INTEL_IOMMU_SVM Kconfig does nothing with PCI_PRI, but AMD_IOMMU > selects PCI_PRI. So if AMD_IOMMU is enabled, intel-iommu.c gets the full > PRI interfaces. If AMD_IOMMU is not enabled, it gets the PRI stubs. > > This seems wrong. The first patch here makes INTEL_IOMMU_SVM select > PCI_PRI so intel-iommu.c always gets the full PRI interfaces. Indeed, this is very wrong, thanks for fixing it. Feel free to apply this series to your tree with my: Reviewed-by: Joerg Roedel Acked-by: Joerg Roedel