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Wed, 16 Oct 2019 11:02:03 +0000 From: Mihail Atanassov To: "james qian wang (Arm Technology China)" CC: Liviu Dudau , "airlied@linux.ie" , Brian Starkey , "maarten.lankhorst@linux.intel.com" , "sean@poorly.run" , "imirkin@alum.mit.edu" , "Jonathan Chai (Arm Technology China)" , "Julien Yin (Arm Technology China)" , "Thomas Sun (Arm Technology China)" , "Lowry Li (Arm Technology China)" , Ayan Halder , "Tiannan Zhu (Arm Technology China)" , "Yiqi Kang (Arm Technology China)" , nd , "linux-kernel@vger.kernel.org" , "dri-devel@lists.freedesktop.org" , Ben Davis , "Oscar Zhang (Arm Technology China)" , "Channing Chen (Arm Technology China)" , Daniel Vetter Subject: Re: [PATCH v5 1/4] drm: Add a new helper drm_color_ctm_s31_32_to_qm_n() Thread-Topic: [PATCH v5 1/4] drm: Add a new helper drm_color_ctm_s31_32_to_qm_n() Thread-Index: AQHVhA1Dae0PEifxdEmUeEe4shI0vKddGiuA Date: Wed, 16 Oct 2019 11:02:03 +0000 Message-ID: <2404938.QDdPyV61sH@e123338-lin> References: <20191016103339.25858-1-james.qian.wang@arm.com> <20191016103339.25858-2-james.qian.wang@arm.com> In-Reply-To: <20191016103339.25858-2-james.qian.wang@arm.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [217.140.106.51] x-clientproxiedby: AM0PR02CA0020.eurprd02.prod.outlook.com (2603:10a6:208:3e::33) To VI1PR08MB4078.eurprd08.prod.outlook.com (2603:10a6:803:e5::28) Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Mihail.Atanassov@arm.com; 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X-MS-Office365-Filtering-Correlation-Id-Prvs: 483f1ccb-28fa-4879-6dd8-08d75228465f NoDisclaimer: True X-Forefront-PRVS: 0192E812EC X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: wHBkfbdp9iY/CmKIRdLxBeG5Zp2Om9vy+gtMGoOWaGWml1ZozTuwSsRmDDQ/vibYd4O8riI2G0JgNIKbpXBQnf0J3HGvlgMRzSCkGfbFnGpxd5s4QAnBQF6Gi84r10B8+/qfqr4aXX38bUlsPpak84QjZAyeNnEHmo5htYUQyB19SB+Meay52C41WVXtUiJTS8rG6xcud2nE+RBWsVCf5TqmXkannzJQimyaN+x/GQMKEk5GPGArylCdYX8hMKMctrxz+p24VcjE2zhSlWhzsNfOUfwfFrt/1iEfsQ1EtAPz3tjFKmBWbYgl/kVGSofGrgylE4dKWKIHfO3TI0FqLAUo6cBP6Fm00ByFHXoY9n7iegOXoZxP1nTmhkbxSCK5TsVdfgPTrG5oUrj3m862PrgldvDRYT53hkaKR/2Xb7E= X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2019 11:02:19.7715 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8f6d1074-7e00-41c0-693e-08d752285075 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB3797 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday, 16 October 2019 11:34:08 BST james qian wang (Arm Technology = China) wrote: > Add a new helper function drm_color_ctm_s31_32_to_qm_n() for driver to > convert S31.32 sign-magnitude to Qm.n 2's complement that supported by > hardware. >=20 > V4: Address Mihai, Daniel and Ilia's review comments. > V5: Includes the sign bit in the value of m (Qm.n). >=20 > Signed-off-by: james qian wang (Arm Technology China) > Reviewed-by: Mihail Atanassov > Reviewed-by: Daniel Vetter > --- > drivers/gpu/drm/drm_color_mgmt.c | 27 +++++++++++++++++++++++++++ > include/drm/drm_color_mgmt.h | 2 ++ > 2 files changed, 29 insertions(+) >=20 > diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color= _mgmt.c > index 4ce5c6d8de99..d313f194f1ec 100644 > --- a/drivers/gpu/drm/drm_color_mgmt.c > +++ b/drivers/gpu/drm/drm_color_mgmt.c > @@ -132,6 +132,33 @@ uint32_t drm_color_lut_extract(uint32_t user_input, = uint32_t bit_precision) > } > EXPORT_SYMBOL(drm_color_lut_extract); > =20 > +/** > + * drm_color_ctm_s31_32_to_qm_n > + * > + * @user_input: input value > + * @m: number of integer bits, include the sign-bit, support range is [1= , 32] Any reason why numbers like Q0.32 are disallowed? In those cases, the 'sign' bit and the first fractional bit just happen to be the same bit. The longer I look at it, the more I think mentioning a 'sign-bit' here might confuse people more, since 2's complement doesn't have a dedicated bit just for the sign. How about reducing it simply to: * @m: number of integer bits, m <=3D 32. > + * @n: number of fractional bits, only support n <=3D 32 > + * > + * Convert and clamp S31.32 sign-magnitude to Qm.n (signed 2's complemen= t). The > + * higher bits that above m + n are cleared or equal to sign-bit BIT(m+n= ). [nit] BIT(m + n - 1) if we count from 0. > + */ > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n) > +{ > + u64 mag =3D (user_input & ~BIT_ULL(63)) >> (32 - n); > + bool negative =3D !!(user_input & BIT_ULL(63)); > + s64 val; > + > + WARN_ON(m < 1 || m > 32 || n > 32); > + > + /* the range of signed 2's complement is [-2^(m-1), 2^(m-1) - 2^-n] */ > + val =3D clamp_val(mag, 0, negative ? > + BIT_ULL(n + m - 1) : BIT_ULL(n + m - 1) - 1); > + > + return negative ? -val : val; > +} > +EXPORT_SYMBOL(drm_color_ctm_s31_32_to_qm_n); > + > /** > * drm_crtc_enable_color_mgmt - enable color management properties > * @crtc: DRM CRTC > diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h > index d1c662d92ab7..60fea5501886 100644 > --- a/include/drm/drm_color_mgmt.h > +++ b/include/drm/drm_color_mgmt.h > @@ -30,6 +30,8 @@ struct drm_crtc; > struct drm_plane; > =20 > uint32_t drm_color_lut_extract(uint32_t user_input, uint32_t bit_precisi= on); > +uint64_t drm_color_ctm_s31_32_to_qm_n(uint64_t user_input, > + uint32_t m, uint32_t n); > =20 > void drm_crtc_enable_color_mgmt(struct drm_crtc *crtc, > uint degamma_lut_size, >=20 --=20 Mihail