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From:   Mihail Atanassov <Mihail.Atanassov@arm.com>
To:     "james qian wang (Arm Technology China)" <james.qian.wang@arm.com>
CC:     Liviu Dudau <Liviu.Dudau@arm.com>,
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        "Lowry Li (Arm Technology China)" <Lowry.Li@arm.com>,
        Ayan Halder <Ayan.Halder@arm.com>,
        "Tiannan Zhu (Arm Technology China)" <Tiannan.Zhu@arm.com>,
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Subject: Re: [PATCH v5 4/4] drm/komeda: Adds gamma and color-transform support
 for DOU-IPS
Thread-Topic: [PATCH v5 4/4] drm/komeda: Adds gamma and color-transform
 support for DOU-IPS
Thread-Index: AQHVhA1TRCL0eNp/dE2Lu5eXcmRLQqddVFwA
Date:   Wed, 16 Oct 2019 14:30:20 +0000
Message-ID: <1854916.b3CkKF7cjY@e123338-lin>
References: <20191016103339.25858-1-james.qian.wang@arm.com>
 <20191016103339.25858-5-james.qian.wang@arm.com>
In-Reply-To: <20191016103339.25858-5-james.qian.wang@arm.com>
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On Wednesday, 16 October 2019 11:34:30 BST james qian wang (Arm Technology =
China) wrote:
> From: "Lowry Li (Arm Technology China)" <Lowry.Li@arm.com>
>=20
> Adds gamma and color-transform support for DOU-IPS.
> Adds two caps members fgamma_coeffs and ctm_coeffs to komeda_improc_state=
.
> If color management changed, set gamma and color-transform accordingly.
>=20
> v5: Rebase with drm-misc-next
>=20
> Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
> ---
>  .../arm/display/komeda/d71/d71_component.c    | 20 +++++++++++++++++++
>  .../gpu/drm/arm/display/komeda/komeda_crtc.c  |  2 ++
>  .../drm/arm/display/komeda/komeda_pipeline.h  |  3 +++
>  .../display/komeda/komeda_pipeline_state.c    |  6 ++++++
>  4 files changed, 31 insertions(+)
>=20
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/dri=
vers/gpu/drm/arm/display/komeda/d71/d71_component.c
> index 6740b8422f11..63a1b6f9cbba 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> @@ -1032,7 +1032,9 @@ static int d71_merger_init(struct d71_dev *d71,
>  static void d71_improc_update(struct komeda_component *c,
>  			      struct komeda_component_state *state)
>  {
> +	struct drm_crtc_state *crtc_st =3D state->crtc->state;
>  	struct komeda_improc_state *st =3D to_improc_st(state);
> +	struct d71_pipeline *pipe =3D to_d71_pipeline(c->pipeline);
>  	u32 __iomem *reg =3D c->reg;
>  	u32 index, mask =3D 0, ctrl =3D 0;
> =20
> @@ -1043,6 +1045,24 @@ static void d71_improc_update(struct komeda_compon=
ent *c,
>  	malidp_write32(reg, BLK_SIZE, HV_SIZE(st->hsize, st->vsize));
>  	malidp_write32(reg, IPS_DEPTH, st->color_depth);
> =20
> +	if (crtc_st->color_mgmt_changed) {
> +		mask |=3D IPS_CTRL_FT | IPS_CTRL_RGB;
> +
> +		if (crtc_st->gamma_lut) {
> +			malidp_write_group(pipe->dou_ft_coeff_addr, FT_COEFF0,
> +					   KOMEDA_N_GAMMA_COEFFS,
> +					   st->fgamma_coeffs);
> +			ctrl |=3D IPS_CTRL_FT; /* enable gamma */
> +		}
> +
> +		if (crtc_st->ctm) {
> +			malidp_write_group(reg, IPS_RGB_RGB_COEFF0,
> +					   KOMEDA_N_CTM_COEFFS,
> +					   st->ctm_coeffs);
> +			ctrl |=3D IPS_CTRL_RGB; /* enable gamut */
> +		}
> +	}
> +
>  	mask |=3D IPS_CTRL_YUV | IPS_CTRL_CHD422 | IPS_CTRL_CHD420;
> =20
>  	/* config color format */
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/g=
pu/drm/arm/display/komeda/komeda_crtc.c
> index 252015210fbc..1c452ea75999 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
> @@ -617,6 +617,8 @@ static int komeda_crtc_add(struct komeda_kms_dev *kms=
,
> =20
>  	crtc->port =3D kcrtc->master->of_output_port;
> =20
> +	drm_crtc_enable_color_mgmt(crtc, 0, true, KOMEDA_COLOR_LUT_SIZE);
> +
>  	return err;
>  }
> =20
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drive=
rs/gpu/drm/arm/display/komeda/komeda_pipeline.h
> index bd6ca7c87037..ac8725e24853 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
> @@ -11,6 +11,7 @@
>  #include <drm/drm_atomic.h>
>  #include <drm/drm_atomic_helper.h>
>  #include "malidp_utils.h"
> +#include "komeda_color_mgmt.h"
> =20
>  #define KOMEDA_MAX_PIPELINES		2
>  #define KOMEDA_PIPELINE_MAX_LAYERS	4
> @@ -327,6 +328,8 @@ struct komeda_improc_state {
>  	struct komeda_component_state base;
>  	u8 color_format, color_depth;
>  	u16 hsize, vsize;
> +	u32 fgamma_coeffs[KOMEDA_N_GAMMA_COEFFS];
> +	u32 ctm_coeffs[KOMEDA_N_CTM_COEFFS];
>  };
> =20
>  /* display timing controller */
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b=
/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
> index 42bdc63dcffa..0930234abb9d 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
> @@ -802,6 +802,12 @@ komeda_improc_validate(struct komeda_improc *improc,
>  		st->color_format =3D BIT(__ffs(avail_formats));
>  	}
> =20
> +	if (kcrtc_st->base.color_mgmt_changed) {
> +		drm_lut_to_fgamma_coeffs(kcrtc_st->base.gamma_lut,
> +					 st->fgamma_coeffs);
> +		drm_ctm_to_coeffs(kcrtc_st->base.ctm, st->ctm_coeffs);
> +	}
> +
>  	komeda_component_add_input(&st->base, &dflow->input, 0);
>  	komeda_component_set_output(&dflow->input, &improc->base, 0);
> =20
>=20
You must've missed it, but I had a

Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com>

(granted, it was deeper in a thread and quite informally written
as 'r-b me')

--=20
Mihail