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Wed, 16 Oct 2019 16:12:03 +0000 From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Paolo Bonzini , Radim K CC: Daniel Lezcano , Thomas Gleixner , Alexander Graf , Atish Patra , Alistair Francis , Damien Le Moal , Christoph Hellwig , Anup Patel , "kvm@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Anup Patel Subject: [PATCH v9 19/22] RISC-V: KVM: Remove per-CPU vsip_shadow variable Thread-Topic: [PATCH v9 19/22] RISC-V: KVM: Remove per-CPU vsip_shadow variable Thread-Index: AQHVhDxyq88TV5U/o0+PXStFQacqrg== Date: Wed, 16 Oct 2019 16:12:03 +0000 Message-ID: <20191016160649.24622-20-anup.patel@wdc.com> References: <20191016160649.24622-1-anup.patel@wdc.com> In-Reply-To: <20191016160649.24622-1-anup.patel@wdc.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MAXPR01CA0098.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:5d::16) To MN2PR04MB6061.namprd04.prod.outlook.com (2603:10b6:208:d8::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Anup.Patel@wdc.com; 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x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 0Nc5l7gNyOLrl/Yg2Y1rj0PNCxbCQKRgAR6TyKDZ1H06Svkmclv9mzIlCGOv2Zl86VwaTzV5c7mZPUoRVt2tHroChMT0t0shEk9UJLmnMl1tmHvSVvgaiKEf2EYfaUBNlmfG54QMBh9qGeDXdmTVVb5ivH9bbi928WhlKvEoBkYEzqzqWyX+PNG56+YcksyZlpM+iyRqMxObfk30VMg5slFcBxC81edKUWq58vwb8bZsPVwPTWTGbbvOCWKQWhJvA0R2sshksK32prj/iir3yEpGBIvmefC6qVsEJiHZHakIxtmFmk407rAGulvPQoq7xN4X0daPSSzpaqT9TLGXPvgl4swKoPzoPKlPe77l+E47a7szu9vn4QdUZbsoFqtcDhMkuDUi2ml15FpKdUzIyEiZQm9grRUlGsKakr7SIWw= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 90b0bc9e-fcde-48f2-20d2-08d7525394ad X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Oct 2019 16:12:03.0629 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pDOu5WzDoJ53NuZzG8LEV/HkpIbpFuWCO4FPHjZMgWT/zkDoAL23IQB0oXaCqPzjOkxg08RL2bba6jVz6IEl4g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB6397 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently, we track last value wrote to VSIP CSR using per-CPU vsip_shadow variable but this easily goes out-of-sync because Guest can update VSIP.SSIP bit directly. To simplify things, we remove per-CPU vsip_shadow variable and unconditionally write vcpu->arch.guest_csr.vsip to VSIP CSR in run-loop. Signed-off-by: Anup Patel --- arch/riscv/include/asm/kvm_host.h | 3 --- arch/riscv/kvm/main.c | 6 ------ arch/riscv/kvm/vcpu.c | 24 +----------------------- 3 files changed, 1 insertion(+), 32 deletions(-) diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm= _host.h index ec1ca4bc98f2..cd86acaed055 100644 --- a/arch/riscv/include/asm/kvm_host.h +++ b/arch/riscv/include/asm/kvm_host.h @@ -202,9 +202,6 @@ static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu= *vcpu) {} static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {} static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} =20 -int kvm_riscv_setup_vsip(void); -void kvm_riscv_cleanup_vsip(void); - #define KVM_ARCH_WANT_MMU_NOTIFIER int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); diff --git a/arch/riscv/kvm/main.c b/arch/riscv/kvm/main.c index 55df85184241..002301a27d29 100644 --- a/arch/riscv/kvm/main.c +++ b/arch/riscv/kvm/main.c @@ -61,17 +61,11 @@ void kvm_arch_hardware_disable(void) =20 int kvm_arch_init(void *opaque) { - int ret; - if (!riscv_isa_extension_available(NULL, h)) { kvm_info("hypervisor extension not available\n"); return -ENODEV; } =20 - ret =3D kvm_riscv_setup_vsip(); - if (ret) - return ret; - kvm_riscv_stage2_vmid_detect(); =20 kvm_info("hypervisor extension available\n"); diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index fd77cd39dd8c..f1a218d3a8cf 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -111,8 +111,6 @@ static void kvm_riscv_vcpu_host_fp_restore(struct kvm_c= pu_context *cntx) {} riscv_isa_extension_mask(s) | \ riscv_isa_extension_mask(u)) =20 -static unsigned long __percpu *vsip_shadow; - static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) { struct kvm_vcpu_csr *csr =3D &vcpu->arch.guest_csr; @@ -765,7 +763,6 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu= *vcpu, void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) { struct kvm_vcpu_csr *csr =3D &vcpu->arch.guest_csr; - unsigned long *vsip =3D raw_cpu_ptr(vsip_shadow); =20 csr_write(CSR_VSSTATUS, csr->vsstatus); csr_write(CSR_VSIE, csr->vsie); @@ -775,7 +772,6 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) csr_write(CSR_VSCAUSE, csr->vscause); csr_write(CSR_VSTVAL, csr->vstval); csr_write(CSR_VSIP, csr->vsip); - *vsip =3D csr->vsip; csr_write(CSR_VSATP, csr->vsatp); =20 kvm_riscv_stage2_update_hgatp(vcpu); @@ -843,26 +839,8 @@ static void kvm_riscv_check_vcpu_requests(struct kvm_v= cpu *vcpu) static void kvm_riscv_update_vsip(struct kvm_vcpu *vcpu) { struct kvm_vcpu_csr *csr =3D &vcpu->arch.guest_csr; - unsigned long *vsip =3D raw_cpu_ptr(vsip_shadow); - - if (*vsip !=3D csr->vsip) { - csr_write(CSR_VSIP, csr->vsip); - *vsip =3D csr->vsip; - } -} - -int kvm_riscv_setup_vsip(void) -{ - vsip_shadow =3D alloc_percpu(unsigned long); - if (!vsip_shadow) - return -ENOMEM; =20 - return 0; -} - -void kvm_riscv_cleanup_vsip(void) -{ - free_percpu(vsip_shadow); + csr_write(CSR_VSIP, csr->vsip); } =20 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) --=20 2.17.1