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From:   Manish Narani <MNARANI@xilinx.com>
To:     Rob Herring <robh@kernel.org>
CC:     "ulf.hansson@linaro.org" <ulf.hansson@linaro.org>,
        "mark.rutland@arm.com" <mark.rutland@arm.com>,
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Subject: RE: [PATCH v3 4/8] dt-bindings: mmc: arasan: Add optional properties
 for Arasan SDHCI
Thread-Topic: [PATCH v3 4/8] dt-bindings: mmc: arasan: Add optional properties
 for Arasan SDHCI
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Date:   Fri, 18 Oct 2019 09:05:07 +0000
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Hi Rob,

Thank you so much for the review.
Please find my comments inline below.

Thanks,
Manish

> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: Thursday, October 17, 2019 11:53 PM
> To: Manish Narani <MNARANI@xilinx.com>
> Cc: ulf.hansson@linaro.org; mark.rutland@arm.com; adrian.hunter@intel.com=
;
> Michal Simek <michals@xilinx.com>; Jolly Shah <JOLLYS@xilinx.com>; Rajan
> Vaja <RAJANV@xilinx.com>; Nava kishore Manne <navam@xilinx.com>;
> mdf@kernel.org; linux-mmc@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; git
> <git@xilinx.com>
> Subject: Re: [PATCH v3 4/8] dt-bindings: mmc: arasan: Add optional proper=
ties
> for Arasan SDHCI
>=20
> On Thu, Oct 17, 2019 at 11:51:46AM +0530, Manish Narani wrote:
> > Add optional propeties for Arasan SDHCI which are used to set clk delay=
s
>=20
> properties
>=20
> > for different speed modes in the controller.
> >
> > Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> > ---
> >  .../devicetree/bindings/mmc/arasan,sdhci.txt      | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> > index b51e40b2e0c5..e0369dd7fb18 100644
> > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> > @@ -46,6 +46,21 @@ Optional Properties:
> >      properly. Test mode can be used to force the controller to functio=
n.
> >    - xlnx,int-clock-stable-broken: when present, the controller always =
reports
> >      that the internal clock is stable even when it is not.
> > +  - clk-phase-legacy: Input/Output Clock Delay pair in degrees for Leg=
acy
> Mode.
> > +  - clk-phase-mmc-hs: Input/Output Clock Delay pair degrees for MMC HS=
.
> > +  - clk-phase-sd-hs: Input/Output Clock Delay pair in degrees for SD H=
S.
> > +  - clk-phase-uhs-sdr12: Input/Output Clock Delay pair in degrees for =
SDR12.
> > +  - clk-phase-uhs-sdr25: Input/Output Clock Delay pair in degrees for =
SDR25.
> > +  - clk-phase-uhs-sdr50: Input/Output Clock Delay pair in degrees for =
SDR50.
> > +  - clk-phase-uhs-sdr104: Input/Output Clock Delay pair in degrees for
> SDR104.
> > +  - clk-phase-uhs-ddr50: Input/Output Clock Delay pair in degrees for =
SD
> DDR50.
> > +  - clk-phase-mmc-ddr52: Input/Output Clock Delay pair in degrees for =
MMC
> DDR52.
> > +  - clk-phase-mmc-hs200: Input/Output Clock Delay pair in degrees for =
MMC
> HS200.
> > +  - clk-phase-mmc-hs400: Input/Output Clock Delay pair in degrees for =
MMC
> HS400.
>=20
> Should be common?
Yes, these properties should be common.

>=20
> Range of values?
As these values are in degrees, the range of values is 0 to 359 degrees.

Thanks,
Manish