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From:   Stephen Boyd <swboyd@chromium.org>
To:     Marc Zyngier <maz@kernel.org>
Cc:     Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
        Mark Rutland <mark.rutland@arm.com>, rnayak@codeaurora.org,
        suzuki.poulose@arm.com, catalin.marinas@arm.com,
        linux-arm-kernel <linux-arm-kernel-bounces@lists.infradead.org>,
        linux-kernel@vger.kernel.org, jeremy.linton@arm.com,
        bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org,
        andrew.murray@arm.com, will@kernel.org, dave.martin@arm.com,
        linux-arm-kernel@lists.infradead.org, marc.w.gonzalez@free.fr
Subject: Re: Relax CPU features sanity checking on heterogeneous architectures
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Date:   Fri, 18 Oct 2019 07:33:29 -0700
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Quoting Marc Zyngier (2019-10-18 00:20:56)
>=20
> If this SoC is anythinig like SM8150, 32bit guests will be hit and=20
> miss,
> depending on the CPU your guest runs on, or is migrated to. We need to
> either drop capabilities from the 32bit-capable CPU, or prevent the
> non-32bit capable CPU from booting if a 32bit guest has been started.
>=20
> You just have to hope that the kernel is entered at EL2, and that QC's
> "value add" has been moved somewhere else...
>=20

Ok that's good.