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[209.132.180.67]) by mx.google.com with ESMTP id i23si5164093edr.191.2019.10.19.01.34.07; Sat, 19 Oct 2019 01:34:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=TX7Lj4fp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2409748AbfJRPWE (ORCPT + 99 others); Fri, 18 Oct 2019 11:22:04 -0400 Received: from mail-io1-f67.google.com ([209.85.166.67]:42203 "EHLO mail-io1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389421AbfJRPWE (ORCPT ); Fri, 18 Oct 2019 11:22:04 -0400 Received: by mail-io1-f67.google.com with SMTP id r15so4184423iod.9; Fri, 18 Oct 2019 08:22:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=6aWYf2EJ6T3lEMsTnZ85l374tBYCs4qR6iBnDivBEd4=; b=TX7Lj4fpNaw+rPLdWCLGA+/mqMT0HXgsnWfnMBYLb8tnQvu8/szGyx5oR1ijczOcvR U4XFvHBasVLmxX7FVJ5xzubfHofrzKvdpQY0sWTOt1VtlRPmi4pOpGp+iVi2RQE4PquB eb+t4LcEDGC503ZWFBi/0chC8eGTK4DF2fdW8s8ip9JgNTwlAe0rjzujRC4TCIV60AT2 VMHXqj9QceAAi+70kuzo1+5QIpJ7gw8aUZEGINUlPFtTv/kJiDaFeqKjKDPPWPr3dD94 F5TjFwjSOS/l2lNRhCU1Lriyd5I3Iem5mt41D7bSZsEmZZBdXM2JhFExX+dTh5V+Vn1A DB9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=6aWYf2EJ6T3lEMsTnZ85l374tBYCs4qR6iBnDivBEd4=; b=JIO4FF91jMT7P8vMZYnIPwFSVI3mwKXUM4IJcAw8B9Z/ppwpSCR7KpdXWJpB/mXmDk TWNjnaE5RK6K/PlXFqWTMgEAKsl4CJMf9r0cNDCQXOTPdE6FH2N/1LaoF6+0vHj19efA vdxGx6/zQnWZmURZVrZZd+7K55fQEqMbCW3WGmj+UuZ1n4Mdsi2hUBV8Z0U9eI9T8Uyg fjQwrGEv0hJbx7IYPA5snU1cvGAnXO3XdJw4pZXgGs8fXSjdviYZT39WUCZBQdN1AP9p 8fvEsk9G9VCGSc9gNOpEhoZTIOpijefdsDOQCtSG+L390/tySh4i/0o8FNRlucVlLbWc R1vA== X-Gm-Message-State: APjAAAWLPvieZgcU1MfGyOV9Xr8praTPOZyUa9Eg0MrAUMXDaN7ysDdX a3t3QE08Aa4lSjYyxX/EpuXZhhcvQh97lZyzjrg= X-Received: by 2002:a02:c646:: with SMTP id k6mr6271439jan.141.1571412123645; Fri, 18 Oct 2019 08:22:03 -0700 (PDT) MIME-Version: 1.0 References: <20191007131649.1768-1-linux.amoon@gmail.com> <20191007131649.1768-6-linux.amoon@gmail.com> <7hsgo4cgeg.fsf@baylibre.com> <1jwode9lba.fsf@starbuckisacylon.baylibre.com> <1496ed3e-e91b-3f09-d359-f36a8944e6b0@baylibre.com> In-Reply-To: <1496ed3e-e91b-3f09-d359-f36a8944e6b0@baylibre.com> From: Anand Moon Date: Fri, 18 Oct 2019 20:51:50 +0530 Message-ID: Subject: Re: [RFCv1 5/5] arm64/ARM: configs: Change CONFIG_PWM_MESON from m to y To: Neil Armstrong Cc: Jerome Brunet , Martin Blumenstingl , Kevin Hilman , devicetree , linux-arm-kernel , linux-amlogic@lists.infradead.org, Linux Kernel Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Neil, On Fri, 18 Oct 2019 at 19:43, Neil Armstrong wrote: > > On 18/10/2019 16:04, Anand Moon wrote: > > Hi Jerome / Neil / Martin, > > > > On Wed, 9 Oct 2019 at 17:34, Jerome Brunet wrote: > >> > >> > >> On Wed 09 Oct 2019 at 10:48, Anand Moon wrote: > >>> > >>> Kernel command line: console=ttyAML0,115200n8 > >>> root=PARTUUID=45d7d61e-01 rw rootwait > >>> earlyprintk=serial,ttyAML0,115200 initcall_debug printk.time=y > >>> > >>> [0] https://pastebin.com/eBgJrSKe > >>> > >>>> you can also try the command line parameter "clk_ignore_unused" (it's > >>>> just a gut feeling: maybe a "critical" clock is being disabled because > >>>> it's not wired up correctly). > >>>> > >>> > >>> It look like some clk issue after I added the *clk_ignore_unused* to > >>> kernel command line > >>> it booted further to login prompt and cpufreq DVFS seem to be loaded. > >>> So I could conclude this is clk issue.below is the boot log > >>> > >>> Kernel command line: console=ttyAML0,115200n8 > >>> root=PARTUUID=45d7d61e-01 rw rootwait > >>> earlyprintk=serial,ttyAML0,115200 initcall_debug printk.time=y > >>> clk_ignore_unused > >>> > >>> [1] https://pastebin.com/Nsk0wZQJ > >>> > >> > >> Next step it to try narrow down the clock causing the issue. > >> Remove clk_ignore_unused from the command line and add CLK_INGORE_UNUSED > >> to the flag of some clocks your clock controller (g12a I think) until > >> > >> The peripheral clock gates already have this flag (something we should > >> fix someday) so don't bother looking there. > >> > >> Most likely the source of the pwm is getting disabled between the > >> late_init call and the probe of the PWM module. Since the pwm is already > >> active (w/o a driver), gating the clock source shuts dowm the power to > >> the cores. > >> > >> Looking a the possible inputs in pwm driver, I'd bet on fdiv4. > >> > > > > I had give this above steps a try but with little success. > > I am still looking into this much close. > > > > Well I am not the expert in clk or bus configuration. > > but after looking into the datasheet of for clk configuration > > I found some bus are not configured correctly. > > > > As per Amlogic's kernel S922X (Hardkernel) > > below link share the bus controller. > > > > [0] https://github.com/hardkernel/linux/blob/odroidn2-4.9.y/arch/arm64/boot/dts/amlogic/mesong12b.dtsi#L295-L315 > > > > looking in to current dts changes it looks bit wrong to me. > > > > *As per 6.1 Memory Map* > > apb_efuse: bus@30000 --> apb_efuse: bus@ff630000 > > periphs: bus@34400 --> periphs: bus@ff634400 > > dmc: bus@38000 --> dmc: bus@ff638000 > > hiu: bus@3c000 --> hiu: bus@ff63c0000 > > If these was wrong, the drivers simply won't work, at all > > > > > Also the order of these is not correct. > > The order is correct, actually > > > > > Down the line in the datasheet some of the interrupt GIC bit are not > > mapped correctly for example. > > > > *As per 6.9.2 Interrupt Control Source* > > 223 SD_EMMC_C > > 222 SD_EMMC_B > > 221 SD_EMMC_A > > There is an offset between the doc and the actual GIC_SPI line, > they start the datasheet numbers from the GIC_PPI numbers (+32). > Ok. Thanks. > Neil > Thanks for answering my query. Best Regards -Anand