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Date:   Fri, 18 Oct 2019 17:40:29 +0100
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From:   Marc Zyngier <maz@kernel.org>
To:     Stephen Boyd <swboyd@chromium.org>
Cc:     Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
        Mark Rutland <mark.rutland@arm.com>, rnayak@codeaurora.org,
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        andrew.murray@arm.com, will@kernel.org, dave.martin@arm.com,
        linux-arm-kernel@lists.infradead.org, marc.w.gonzalez@free.fr
Subject: Re: Relax CPU features sanity checking on heterogeneous architectures
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On Fri, 18 Oct 2019 15:33:29 +0100,
Stephen Boyd <swboyd@chromium.org> wrote:
> 
> Quoting Marc Zyngier (2019-10-18 00:20:56)
> > 
> > If this SoC is anythinig like SM8150, 32bit guests will be hit and 
> > miss,
> > depending on the CPU your guest runs on, or is migrated to. We need to
> > either drop capabilities from the 32bit-capable CPU, or prevent the
> > non-32bit capable CPU from booting if a 32bit guest has been started.
> > 
> > You just have to hope that the kernel is entered at EL2, and that QC's
> > "value add" has been moved somewhere else...
> > 
> 
> Ok that's good.

I need a new signature.

	M.

-- 
Jazz is not dead, it just smells funny.