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charset="us-ascii" Content-ID: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: aa853055-6cdc-4518-590a-08d75407051c X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Oct 2019 20:09:02.6580 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: H/RuhIHLsoIkbXckRdl0p92N5A0KDkCRyLRNCdxmDl2cfSDCDuWJGa9+MUW43oAk764Tk5nB0J+U2T9ui+UMKA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1801MB1848 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-18_05:2019-10-18,2019-10-18 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 18, 2019 at 12:43:49AM +0100, Will Deacon wrote: > Hi Linus, >=20 > Please pull these arm64 fixes for -rc4. The main thing here is a > long-awaited workaround for a CPU erratum on ThunderX2 which we have > developed in conjunction with engineers from Cavium/Marvell. At the momen= t, > the workaround is unconditionally enabled for affected CPUs at runtime > but we may add a command-line option to disable it in future if performan= ce > numbers show up indicating a significant cost for real workloads. As the Cavium/Marvell engineer who was involved in this, I will note that I had suggested a patch providing a runtime override[1] while providing safe defaults. Marc's patchset adds a trap to hypervisor in the system call path when KPTI is enabled, and KPTI is generally enabled on stock VM images. So normal users will see some performance regression (e.g I see something in the range of 3-4% on guest kernel compile). As a policy, I don't agree with having errata workarounds that can be left to the discretion of the admin to be forced at compile time. Since most of these workarounds use run-time code patching with alternatives, there is no need to do this at all. But given that this is already merged and cc:ed to stable, I will see if I can come up with enough data to convince Will. JC [1] https://lore.kernel.org/linux-arm-kernel/20191011232031.GA29752@dc5-eodlnx0= 5.marvell.com/T/