Received: by 2002:a25:d7c1:0:0:0:0:0 with SMTP id o184csp3096326ybg; Sun, 20 Oct 2019 06:43:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqzblhBlaiOcefSAt1RnPSvpmg3S103AOAQqUtD5V3zuteZ+p9WQWRXfc5Dcj7zXszQmUfcI X-Received: by 2002:a50:e40c:: with SMTP id d12mr19353467edm.256.1571578986468; Sun, 20 Oct 2019 06:43:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571578986; cv=none; d=google.com; s=arc-20160816; b=JU8rqeJDAPW6ExkDxzzZrqk3DD1a+wII522eyQiu4hx+KpLNEN56QJVOmvunr5qgRa q42EPtZPCX6uYmRasXf4JKrMEEuYHHSiRx+huh56Q8K8LA/yyB1BpIW9R7nmN59klMpd Ke7vCObPEZifrbAy49MPUHRW4nAHsArpgXeIB40MdQ1ZzIVih5omDWia8VDHL+1QR/LG hNoVnyDgpXmYrP5J6XRaFUbk+nwjVYqPObOtIDtUpGzEwDZctvqKT0yP+n/KdrliJZ6P LjfR0p0BGl7h5Va7uSmlT+xIdcxnch6fQe+VECJfxrmE755SKIWIG5SSjHIPIQPccIOl T81A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=D4oE9PCQoj0eBZtGVMU2KulGl7jTI0+fpbtSRXTiME8=; b=eefOJYFErjcD/Kk1d7fzXReiT06FRpCM7SUBa/bgybptAm4TVXtSz/1ROJtwRjLDVl wxifL+hdugU+fYbUeixVoOwz3K4ZUOFZhpms2NaohXpdkWFmBxI4iNyaHaq1ASGHZvSy aP0qfx51lduZUxIj32/EMwFqsTVTriRRa1XXl/KWevqiZF0frUbVHiBFcF+6hn7kxeun wUMTyPDmO8u1rKT4Bi+kKiUZrkzPva4shGOqADaTgaL6cgbXWRyL0xMQj8L7W5ckMIGF 4YoDV6mcLOUEUqNfIsi9uCCTt9WrHlCE1i64fmTN/vzih9So0GfZ59YZB5FcoJ93z+rd HKag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@megous.com header.s=mail header.b=GEonPDHa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=megous.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x6si1009480eju.349.2019.10.20.06.42.42; Sun, 20 Oct 2019 06:43:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@megous.com header.s=mail header.b=GEonPDHa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=megous.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726492AbfJTNmf (ORCPT + 99 others); Sun, 20 Oct 2019 09:42:35 -0400 Received: from vps.xff.cz ([195.181.215.36]:52620 "EHLO vps.xff.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726349AbfJTNmd (ORCPT ); Sun, 20 Oct 2019 09:42:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1571578952; bh=HFSrXSPJyZ/r/g3KvWIYj4ef7s1MoOfxTtkAX4wXq50=; h=From:To:Cc:Subject:Date:References:From; b=GEonPDHa6dAj8IQNI362IJTat+lXX4X4xGT0W2YVbPkzUHdnZVue/WOTLUDFmZ69Z WWTwVUFThlPCZiwNH0XMpsghZETlWi87QbUsDa/pDWDVf304lGaGQba8yufiED//2I /IT0A2cQYtcw/ZwIyXjalxDOXonEOOeG9/5vCZVY= From: megous@megous.com To: linux-sunxi@googlegroups.com, Kishon Vijay Abraham I , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Thomas Gleixner , Arnd Bergmann Cc: Greg Kroah-Hartman , Paul Kocialkowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Ondrej Jirman Subject: [PATCH 3/4] arm64: dts: allwinner: h6: add USB3 device nodes Date: Sun, 20 Oct 2019 15:42:28 +0200 Message-Id: <20191020134229.1216351-4-megous@megous.com> In-Reply-To: <20191020134229.1216351-1-megous@megous.com> References: <20191020134229.1216351-1-megous@megous.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Icenowy Zheng Allwinner H6 SoC features USB3 functionality, with a DWC3 controller and a custom PHY. Add device tree nodes for them. Signed-off-by: Ondrej Jirman Signed-off-by: Icenowy Zheng Reviewed-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 32 ++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index 0d5ea19336a1..80233db478e6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -537,6 +537,38 @@ status = "disabled"; }; + dwc3: dwc3@5200000 { + compatible = "snps,dwc3"; + reg = <0x05200000 0x10000>; + interrupts = ; + clocks = <&ccu CLK_BUS_XHCI>, + <&ccu CLK_BUS_XHCI>, + <&rtc 0>; + clock-names = "ref", "bus_early", "suspend"; + resets = <&ccu RST_BUS_XHCI>; + /* + * The datasheet of the chip doesn't declare the + * peripheral function, and there's no boards known + * to have a USB Type-B port routed to the port. + * In addition, no one has tested the peripheral + * function yet. + * So set the dr_mode to "host" in the DTSI file. + */ + dr_mode = "host"; + phys = <&usb3phy>; + phy-names = "usb3-phy"; + status = "disabled"; + }; + + usb3phy: phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + status = "disabled"; + }; + ehci3: usb@5311000 { compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; reg = <0x05311000 0x100>; -- 2.23.0