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Mon, 21 Oct 2019 13:50:14 +0000 From: Ayan Halder To: Andrzej Pietrasiewicz CC: "dri-devel@lists.freedesktop.org" , David Airlie , Liviu Dudau , "james qian wang (Arm Technology China)" , Mihail Atanassov , "linux-rockchip@lists.infradead.org" , "linux-arm-kernel@lists.infradead.org" , "kernel@collabora.com" , Sean Paul , "linux-kernel@vger.kernel.org" , nd Subject: Re: [PATCH 1/2] drm/arm: Factor out generic afbc helpers Thread-Topic: [PATCH 1/2] drm/arm: Factor out generic afbc helpers Thread-Index: AQHVgCWk2PTQa3ML1Uqc0tbSduIYPqdlLKCA Date: Mon, 21 Oct 2019 13:50:14 +0000 Message-ID: <20191021135013.GA16072@arm.com> References: <20191011111813.20851-1-andrzej.p@collabora.com> <20191011111813.20851-2-andrzej.p@collabora.com> In-Reply-To: <20191011111813.20851-2-andrzej.p@collabora.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: LO2P265CA0057.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:60::21) To AM0PR08MB5345.eurprd08.prod.outlook.com (2603:10a6:208:18c::21) Authentication-Results-Original: spf=none (sender IP is ) smtp.mailfrom=Ayan.Halder@arm.com; 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X-MS-Office365-Filtering-Correlation-Id-Prvs: 04ec1194-78a1-40ca-9306-08d7562d9920 NoDisclaimer: True X-Forefront-PRVS: 0197AFBD92 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: lCMzLwkvTQtKhkSjgafg/dPzB4YoFk/VaFhPPGJkJVRlqQbg7yCAsCIRvr21vgMBaG+K1+l6J6GzzJifEy3UwXypzDR1DpHKxiJXNzfrCOcfhyDl6u+XSIUi/0rZH3uIxjDMN0nUEDYbcJH6ZeauRwNTJ7woXruWJDfa4vrEEeG3Ic1cLKcb8mYi0IP666cwco83z5ZPeKWJvP6gIuLKTkBUURgm8Tr17jT9ybdmesCvvf8EofocYcInb0so8+9WlZKciCm4EdQDsKQjvlrpM4xEijTIOcEuGIWVAcSEHP0rVkpxiYIfqj9w5jVpLvTIxRRbASTRyg0mO6QYSrsFI0ZW9wPbOJTOlNmrzRIMjQtrGqSlXRUIqfa4oAo0cphDQ6VTrodT5RaEJTpXey5CvDtZAv9BfKsrof8xnbTF40TH6lWbtJO73WgZtVQ+wWV3jdTsZ5EVOjFCNtDUJNT32w== X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2019 13:50:28.6317 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7a4136a1-fbe7-4502-31d7-08d7562da201 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR08MB3244 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 11, 2019 at 01:18:10PM +0200, Andrzej Pietrasiewicz wrote: > These are useful for other users of afbc, e.g. rockchip. >=20 > Signed-off-by: Andrzej Pietrasiewicz Hi Andrzej, Thanks a lot for doing this. Much appreciated. :) It was on our TODO list for a long time. I have cc-ed james.qian.wang@arm.com, Mihail.Atanassov@arm.com for their comments as well. > --- > drivers/gpu/drm/Kconfig | 4 ++ > drivers/gpu/drm/Makefile | 1 + > drivers/gpu/drm/arm/Kconfig | 1 + > drivers/gpu/drm/arm/malidp_drv.c | 58 ++-------------- > drivers/gpu/drm/drm_afbc.c | 114 +++++++++++++++++++++++++++++++ > include/drm/drm_afbc.h | 25 +++++++ > 6 files changed, 149 insertions(+), 54 deletions(-) > create mode 100644 drivers/gpu/drm/drm_afbc.c > create mode 100644 include/drm/drm_afbc.h >=20 > diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig > index 3c88420e3497..00e3f90557f4 100644 > --- a/drivers/gpu/drm/Kconfig > +++ b/drivers/gpu/drm/Kconfig > @@ -195,6 +195,10 @@ config DRM_SCHED > tristate > depends on DRM > =20 > +config DRM_AFBC > + tristate > + depends on DRM Adding a 'help' would be great here. Stealing the first line from https://www.kernel.org/doc/html/latest/gpu/afbc.html "AFBC is a proprietary lossless image compression protocol and format. It provides fine-grained random access and minimizes the amount of data transferred between IP blocks." > + > source "drivers/gpu/drm/i2c/Kconfig" > =20 > source "drivers/gpu/drm/arm/Kconfig" > diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile > index 9f0d2ee35794..55368b668355 100644 > --- a/drivers/gpu/drm/Makefile > +++ b/drivers/gpu/drm/Makefile > @@ -31,6 +31,7 @@ drm-$(CONFIG_OF) +=3D drm_of.o > drm-$(CONFIG_AGP) +=3D drm_agpsupport.o > drm-$(CONFIG_DEBUG_FS) +=3D drm_debugfs.o drm_debugfs_crc.o > drm-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) +=3D drm_edid_load.o > +drm-$(CONFIG_DRM_AFBC) +=3D drm_afbc.o > =20 > drm_vram_helper-y :=3D drm_gem_vram_helper.o \ > drm_vram_helper_common.o \ > diff --git a/drivers/gpu/drm/arm/Kconfig b/drivers/gpu/drm/arm/Kconfig > index a204103b3efb..25c3dc408cda 100644 > --- a/drivers/gpu/drm/arm/Kconfig > +++ b/drivers/gpu/drm/arm/Kconfig > @@ -29,6 +29,7 @@ config DRM_MALI_DISPLAY > select DRM_KMS_HELPER > select DRM_KMS_CMA_HELPER > select DRM_GEM_CMA_HELPER > + select DRM_AFBC > select VIDEOMODE_HELPERS > help > Choose this option if you want to compile the ARM Mali Display > diff --git a/drivers/gpu/drm/arm/malidp_drv.c b/drivers/gpu/drm/arm/malid= p_drv.c > index f25ec4382277..a67b69e08f63 100644 > --- a/drivers/gpu/drm/arm/malidp_drv.c > +++ b/drivers/gpu/drm/arm/malidp_drv.c > @@ -16,6 +16,7 @@ > #include > =20 > #include > +#include > #include > #include > #include > @@ -33,8 +34,6 @@ > #include "malidp_hw.h" > =20 > #define MALIDP_CONF_VALID_TIMEOUT 250 > -#define AFBC_HEADER_SIZE 16 > -#define AFBC_SUPERBLK_ALIGNMENT 128 > =20 > static void malidp_write_gamma_table(struct malidp_hw_device *hwdev, > u32 data[MALIDP_COEFFTAB_NUM_COEFFS]) > @@ -275,24 +274,8 @@ malidp_verify_afbc_framebuffer_caps(struct drm_devic= e *dev, > mode_cmd->modifier[0]) =3D=3D false) > return false; > =20 > - if (mode_cmd->offsets[0] !=3D 0) { > - DRM_DEBUG_KMS("AFBC buffers' plane offset should be 0\n"); > - return false; > - } > - > - switch (mode_cmd->modifier[0] & AFBC_SIZE_MASK) { > - case AFBC_SIZE_16X16: > - if ((mode_cmd->width % 16) || (mode_cmd->height % 16)) { > - DRM_DEBUG_KMS("AFBC buffers must be aligned to 16 pixels\n"); > - return false; > - } > - break; > - default: > - DRM_DEBUG_KMS("Unsupported AFBC block size\n"); > - return false; > - } > - > - return true; > + return drm_afbc_check_offset(dev, mode_cmd) && > + drm_afbc_check_size_align(dev, mode_cmd); > } > =20 > static bool > @@ -300,53 +283,20 @@ malidp_verify_afbc_framebuffer_size(struct drm_devi= ce *dev, > struct drm_file *file, > const struct drm_mode_fb_cmd2 *mode_cmd) > { > - int n_superblocks =3D 0; > const struct drm_format_info *info; > struct drm_gem_object *objs =3D NULL; > - u32 afbc_superblock_size =3D 0, afbc_superblock_height =3D 0; > - u32 afbc_superblock_width =3D 0, afbc_size =3D 0; > int bpp =3D 0; > =20 > - switch (mode_cmd->modifier[0] & AFBC_SIZE_MASK) { > - case AFBC_SIZE_16X16: > - afbc_superblock_height =3D 16; > - afbc_superblock_width =3D 16; > - break; > - default: > - DRM_DEBUG_KMS("AFBC superblock size is not supported\n"); > - return false; > - } > - > info =3D drm_get_format_info(dev, mode_cmd); > - > - n_superblocks =3D (mode_cmd->width / afbc_superblock_width) * > - (mode_cmd->height / afbc_superblock_height); > - > bpp =3D malidp_format_get_bpp(info->format); > =20 > - afbc_superblock_size =3D (bpp * afbc_superblock_width * afbc_superblock= _height) > - / BITS_PER_BYTE; > - > - afbc_size =3D ALIGN(n_superblocks * AFBC_HEADER_SIZE, AFBC_SUPERBLK_ALI= GNMENT); > - afbc_size +=3D n_superblocks * ALIGN(afbc_superblock_size, AFBC_SUPERBL= K_ALIGNMENT); > - > - if ((mode_cmd->width * bpp) !=3D (mode_cmd->pitches[0] * BITS_PER_BYTE)= ) { > - DRM_DEBUG_KMS("Invalid value of (pitch * BITS_PER_BYTE) (=3D%u) " > - "should be same as width (=3D%u) * bpp (=3D%u)\n", > - (mode_cmd->pitches[0] * BITS_PER_BYTE), > - mode_cmd->width, bpp); > - return false; > - } > - > objs =3D drm_gem_object_lookup(file, mode_cmd->handles[0]); > if (!objs) { > DRM_DEBUG_KMS("Failed to lookup GEM object\n"); > return false; > } > =20 > - if (objs->size < afbc_size) { > - DRM_DEBUG_KMS("buffer size (%zu) too small for AFBC buffer size =3D %u= \n", > - objs->size, afbc_size); > + if (!drm_afbc_check_fb_size(dev, mode_cmd, objs, bpp)) { > drm_gem_object_put_unlocked(objs); > return false; > } Also can you do the code refactoring for komeda driver as well. specifically komeda_fb_afbc_size_check(). I will let james.qian.wang@arm.com and Mihail.Atanassov@arm.com have their opinion on this. > diff --git a/drivers/gpu/drm/drm_afbc.c b/drivers/gpu/drm/drm_afbc.c > new file mode 100644 > index 000000000000..3e8a9225fd2e > --- /dev/null > +++ b/drivers/gpu/drm/drm_afbc.c > @@ -0,0 +1,114 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) 2019 Collabora Ltd. > + * > + * author: Andrzej Pietrasiewicz > + * > + */ > +#include > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define AFBC_HEADER_SIZE 16 > +#define AFBC_SUPERBLK_ALIGNMENT 128 > + > +bool drm_afbc_check_offset(struct drm_device *dev, > + const struct drm_mode_fb_cmd2 *mode_cmd) > +{ > + if (mode_cmd->offsets[0] !=3D 0) { > + DRM_DEBUG_KMS("AFBC buffers' plane offset should be 0\n"); > + return false; > + } > + > + return true; > +} > +EXPORT_SYMBOL_GPL(drm_afbc_check_offset); > + > +bool drm_afbc_check_size_align(struct drm_device *dev, > + const struct drm_mode_fb_cmd2 *mode_cmd) > +{ > + > + switch (mode_cmd->modifier[0] & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK) { > + case AFBC_FORMAT_MOD_BLOCK_SIZE_16x16: > + if ((mode_cmd->width % 16) || (mode_cmd->height % 16)) { > + DRM_DEBUG_KMS( > + "AFBC buffer must be aligned to 16 pixels\n" > + ); > + return false; > + } > + break; > + case AFBC_FORMAT_MOD_BLOCK_SIZE_32x8: > + /* fall through */ > + case AFBC_FORMAT_MOD_BLOCK_SIZE_64x4: > + /* fall through */ > + case AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4: > + /* fall through */ > + default: > + DRM_DEBUG_KMS("Unsupported AFBC block size\n"); > + return false; > + } > + > + return true; > +} > +EXPORT_SYMBOL_GPL(drm_afbc_check_size_align); > + > +bool drm_afbc_check_fb_size(struct drm_device *dev, > + const struct drm_mode_fb_cmd2 *mode_cmd, > + struct drm_gem_object *objs, int bpp) > +{ > + int n_superblocks =3D 0; > + u32 afbc_superblock_size =3D 0, afbc_superblock_height =3D 0; > + u32 afbc_superblock_width =3D 0, afbc_size =3D 0; > + > + switch (mode_cmd->modifier[0] & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK) { > + case AFBC_FORMAT_MOD_BLOCK_SIZE_16x16: > + afbc_superblock_height =3D 16; > + afbc_superblock_width =3D 16; > + break; > + case AFBC_FORMAT_MOD_BLOCK_SIZE_32x8: Copying from https://cgit.freedesktop.org/drm/drm-tip/tree/drivers/gpu/drm/arm/display/k= omeda/komeda_framebuffer.c#n60 afbc_superblock_width =3D 32; afbc_superblock_height =3D 8; > + /* fall through */ > + case AFBC_FORMAT_MOD_BLOCK_SIZE_64x4: > + /* fall through */ > + case AFBC_FORMAT_MOD_BLOCK_SIZE_32x8_64x4: > + /* fall through */ > + default: > + DRM_DEBUG_KMS("AFBC superblock size is not supported\n"); > + return false; > + } Can you combine the two switch - case confitions (from this function and the one in drm_afbc_check_size_align()) and put it in a separate function (say drm_afbc_get_superblock_dimensions()) of its own ? This will help to avoid code repetition. > + > + n_superblocks =3D (mode_cmd->width / afbc_superblock_width) * > + (mode_cmd->height / afbc_superblock_height); > + > + afbc_superblock_size =3D > + (bpp * afbc_superblock_width * afbc_superblock_height) > + / BITS_PER_BYTE; > + > + afbc_size =3D ALIGN(n_superblocks * AFBC_HEADER_SIZE, > + AFBC_SUPERBLK_ALIGNMENT); > + afbc_size +=3D n_superblocks * > + ALIGN(afbc_superblock_size, AFBC_SUPERBLK_ALIGNMENT); > + > + if ((mode_cmd->width * bpp) !=3D (mode_cmd->pitches[0] * BITS_PER_BYTE)= ) { > + DRM_DEBUG_KMS("Invalid value of (pitch * BITS_PER_BYTE) (=3D%u) should= be same as width (=3D%u) * bpp (=3D%u)\n", > + mode_cmd->pitches[0] * BITS_PER_BYTE, > + mode_cmd->width, bpp > + ); > + return false; > + } > + > + if (objs->size < afbc_size) { > + DRM_DEBUG_KMS("buffer size (%zu) too small for AFBC buffer size =3D %u= \n", > + objs->size, afbc_size > + ); > + > + return false; > + } > + > + return true; > +} > +EXPORT_SYMBOL(drm_afbc_check_fb_size); > diff --git a/include/drm/drm_afbc.h b/include/drm/drm_afbc.h > new file mode 100644 > index 000000000000..ce39c850217b > --- /dev/null > +++ b/include/drm/drm_afbc.h > @@ -0,0 +1,25 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + * (C) 2019 Collabora Ltd. > + * > + * author: Andrzej Pietrasiewicz > + * > + */ > +#ifndef __DRM_AFBC_H__ > +#define __DRM_AFBC_H__ > + > +struct drm_device; > +struct drm_mode_fb_cmd2; > +struct drm_gem_object; > + > +bool drm_afbc_check_offset(struct drm_device *dev, > + const struct drm_mode_fb_cmd2 *mode_cmd); > + > +bool drm_afbc_check_size_align(struct drm_device *dev, > + const struct drm_mode_fb_cmd2 *mode_cmd); > + > +bool drm_afbc_check_fb_size(struct drm_device *dev, > + const struct drm_mode_fb_cmd2 *mode_cmd, > + struct drm_gem_object *objs, int bpp); > + > +#endif /* __DRM_AFBC_H__ */ > -- > 2.17.1 >=20 > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel