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[209.132.180.67]) by mx.google.com with ESMTP id 1si4487767edv.82.2019.10.21.12.58.41; Mon, 21 Oct 2019 12:59:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730176AbfJUT6e (ORCPT + 99 others); Mon, 21 Oct 2019 15:58:34 -0400 Received: from mxout2.idt.com ([157.165.5.26]:58754 "EHLO mxout2.idt.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726672AbfJUT6e (ORCPT ); Mon, 21 Oct 2019 15:58:34 -0400 Received: from mail6.idt.com (localhost [127.0.0.1]) by mxout2.idt.com (8.14.4/8.14.4) with ESMTP id x9LJwKdh002423; Mon, 21 Oct 2019 12:58:20 -0700 Received: from corpml3.corp.idt.com (corpml3.corp.idt.com [157.165.140.25]) by mail6.idt.com (8.14.4/8.14.4) with ESMTP id x9LJwJif008501; Mon, 21 Oct 2019 12:58:19 -0700 Received: from vcheng-VirtualBox.na.ads.idt.com (corpimss2.corp.idt.com [157.165.141.30]) by corpml3.corp.idt.com (8.11.7p1+Sun/8.11.7) with ESMTP id x9LJwHW22079; Mon, 21 Oct 2019 12:58:17 -0700 (PDT) From: vincent.cheng.xh@renesas.com To: devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, andrew@lunn.ch, robh+dt@kernel.org Cc: mark.rutland@arm.com, richardcochran@gmail.com, Vincent Cheng Subject: [PATCH v3 1/2] dt-bindings: ptp: Add bindings doc for IDT ClockMatrix based PTP clock Date: Mon, 21 Oct 2019 15:57:47 -0400 Message-Id: <1571687868-22834-1-git-send-email-vincent.cheng.xh@renesas.com> X-Mailer: git-send-email 2.7.4 X-TM-AS-MML: disable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vincent Cheng Add device tree binding doc for the IDT ClockMatrix PTP clock. Co-developed-by: Richard Cochran Signed-off-by: Richard Cochran Signed-off-by: Vincent Cheng --- Changes since v2: - As suggested by Rob Herring: 1. Replace with DT schema 2. Remove '-ptp' from compatible string 3. Replace wildcard 'x' with the part numbers. Changes since v1: - No changes --- .../devicetree/bindings/ptp/ptp-idtcm.yaml | 63 ++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml diff --git a/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml b/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml new file mode 100644 index 0000000..d3771e0 --- /dev/null +++ b/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ptp/ptp-idtcm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IDT ClockMatrix (TM) PTP Clock Device Tree Bindings + +maintainers: + - Vincent Cheng + +properties: + compatible: + enum: + # For System Synchronizer + - idt,8a34000 + - idt,8a34001 + - idt,8a34002 + - idt,8a34003 + - idt,8a34004 + - idt,8a34005 + - idt,8a34006 + - idt,8a34007 + - idt,8a34008 + - idt,8a34009 + # For Port Synchronizer + - idt,8a34010 + - idt,8a34011 + - idt,8a34012 + - idt,8a34013 + - idt,8a34014 + - idt,8a34015 + - idt,8a34016 + - idt,8a34017 + - idt,8a34018 + - idt,8a34019 + # For Universal Frequency Translator (UFT) + - idt,8a34040 + - idt,8a34041 + - idt,8a34042 + - idt,8a34043 + - idt,8a34044 + - idt,8a34045 + - idt,8a34046 + - idt,8a34047 + - idt,8a34048 + - idt,8a34049 + + reg: + maxItems: 1 + description: + I2C slave address of the device. + +required: + - compatible + - reg + +examples: + - | + phc@5b { + compatible = "idt,8a34000"; + reg = <0x5b>; + }; -- 2.7.4