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[209.132.180.67]) by mx.google.com with ESMTP id j52si4224649eda.438.2019.10.22.02.45.14; Tue, 22 Oct 2019 02:45:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@infradead.org header.s=merlin.20170209 header.b=ltGOOSMB; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731546AbfJVJnL (ORCPT + 99 others); Tue, 22 Oct 2019 05:43:11 -0400 Received: from merlin.infradead.org ([205.233.59.134]:37390 "EHLO merlin.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731421AbfJVJnK (ORCPT ); Tue, 22 Oct 2019 05:43:10 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=RwIP5iYVyDPZ4XmYjQVjvZswU8VLxR/GtcD4XS8SImg=; b=ltGOOSMBEdi9MdfgedYGqHuDC GzgOqwKXl4XZ/ydrrwwa9xZBYSvImnTuIVpeuYFKzzJdp6Heo7UPXreMaXNjYrqF6DQY/05jSrsLS Lfin28Y/Jl2yXuKUvgSU3l+GjP4eSa/K0eiC1CM6lzjpqe8MVuAHHwf/1NXQfHhTt5gyzRsDOrXEh hzMIWn+ejfiZXx0yiecL1nheG9st/oxoGsFOQxnjKxy16SZWLqiDRblgSpCNUWQ5m+0xIhIYzP2CC bWG14fRJ8ZF221vTMXFf1kxNkd7So0jrYKj7+ijD0l2pDJORAqJSncIQLn+KwjkHN6g1+iH95AFKS eH2NsWntQ==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.92.3 #3 (Red Hat Linux)) id 1iMqgv-0002RW-EB; Tue, 22 Oct 2019 09:43:01 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id A3A87300F29; Tue, 22 Oct 2019 11:42:02 +0200 (CEST) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 2900F20977B04; Tue, 22 Oct 2019 11:43:00 +0200 (CEST) Date: Tue, 22 Oct 2019 11:43:00 +0200 From: Peter Zijlstra To: Alexey Budankov Cc: Arnaldo Carvalho de Melo , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Andi Kleen , Kan Liang , Stephane Eranian , Ian Rogers , Song Liu , linux-kernel Subject: Re: [PATCH v4 4/4] perf/core,x86: synchronize PMU task contexts on optimized context switches Message-ID: <20191022094300.GL1817@hirez.programming.kicks-ass.net> References: <4d6320bb-0d15-0028-aefb-a176c986b8db@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4d6320bb-0d15-0028-aefb-a176c986b8db@linux.intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 22, 2019 at 09:01:11AM +0300, Alexey Budankov wrote: > swap(ctx->task_ctx_data, next_ctx->task_ctx_data); > > + /* > + * PMU specific parts of task perf context can require > + * additional synchronization which makes sense only if > + * both next_ctx->task_ctx_data and ctx->task_ctx_data > + * pointers are allocated. As an example of such > + * synchronization see implementation details of Intel > + * LBR call stack data profiling; > + */ > + if (ctx->task_ctx_data && next_ctx->task_ctx_data) > + pmu->sync_task_ctx(next_ctx->task_ctx_data, > + ctx->task_ctx_data); This still does not check if pmu->sync_task_ctx is set. If any other arch ever uses task_ctx_data without then also supplying this method things will go *bang*. Also, I think I prefer the variant I gave you yesterday: https://lkml.kernel.org/r/20191021103745.GF1800@hirez.programming.kicks-ass.net if (pmu->swap_task_ctx) pmu->swap_task_ctx(ctx, next_ctx); else swap(ctx->task_ctx_data, next_ctx->task_ctx_data); That also unconfuses the argument order in your above patch (where you have to undo thw swap). Alternatively, since there currently is no other arch using task_ctx_data, we can make the pmu::swap_task_ctx() thing mandatory when having it and completely replace the swap(), write it like so: - swap(ctx->task_ctx_data, next_ctx->task_ctx_data); + if (pmu->swap_task_ctx) + pmu->swap_task_ctx(ctx, next_ctx); Hmm?