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Subject: Re: [PATCH v3 6/6] KVM: x86/vPMU: Add lazy mechanism to release
 perf_event per vPMC
To:     Like Xu <like.xu@linux.intel.com>, peterz@infradead.org,
        kvm@vger.kernel.org
Cc:     like.xu@intel.com, linux-kernel@vger.kernel.org,
        jmattson@google.com, sean.j.christopherson@intel.com,
        wei.w.wang@intel.com, kan.liang@intel.com
References: <20191021160651.49508-1-like.xu@linux.intel.com>
 <20191021160651.49508-7-like.xu@linux.intel.com>
From:   Paolo Bonzini <pbonzini@redhat.com>
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Message-ID: <c17a9d77-2c30-b3c0-4652-57f0b9252f3b@redhat.com>
Date:   Tue, 22 Oct 2019 12:47:11 +0200
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On 21/10/19 18:06, Like Xu wrote:
> =20
> +=09=09__set_bit(INTEL_PMC_IDX_FIXED + i, pmu->pmc_in_use);
>  =09=09reprogram_fixed_counter(pmc, new_ctrl, i);
>  =09}
> =20
> @@ -329,6 +330,11 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
>  =09    (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) =
&&
>  =09    (entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM)))
>  =09=09pmu->reserved_bits ^=3D HSW_IN_TX|HSW_IN_TX_CHECKPOINTED;
> +
> +=09bitmap_set(pmu->all_valid_pmc_idx,
> +=09=090, pmu->nr_arch_gp_counters);
> +=09bitmap_set(pmu->all_valid_pmc_idx,
> +=09=09INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);

The offset needs to be INTEL_PMC_IDX_FIXED for GP counters, and 0 for
fixed counters, otherwise pmc_in_use and all_valid_pmc_idx are not in sync.

Paolo