Received: by 2002:a25:d7c1:0:0:0:0:0 with SMTP id o184csp1292979ybg; Wed, 23 Oct 2019 13:25:18 -0700 (PDT) X-Google-Smtp-Source: APXvYqwBIkZ7cRfIu0iAm3c0BWnvGyNUKkTIfosh2xhOnaUKkAySUNB8F/cysc6N7r3GTC5WgRaw X-Received: by 2002:a50:c949:: with SMTP id p9mr39008210edh.25.1571862318338; Wed, 23 Oct 2019 13:25:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571862318; cv=none; d=google.com; s=arc-20160816; b=Rp2tvqQFqPebGAH5zDcJKzM7/XYcM/gS5bDsLK9IKyXtNwupV0h/whsbCtpuUOf1U1 azyBDFBcTMyz+7MSJw05sXHyl5AOo8G83e8dIQAtc8B5D9+VtwD1t22yk37anGPHFgs5 Dh9hNqTmVXhi4UsRGaBWz9PrIsY3YvtkkOwRKv00sFzxZvaTNDrENHLDJMHBLBfNDxQk OGUoJAgV48IYNrfIpks0fKlyFMi015IqQncPFsBiqwGJvg0DWZKYU0+MVgosykTxn6Ar iNEv+kbKrLg0ZCYzP417IEUr7efNFBur1YCM6Gl1wSAjDKAVl2A0wnJ0N2yntGckw3SS YZ1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=/8itk7lGtZW+Ng5XX2GxFYXhvAS9bBVqmGxGQqLrKL8=; b=N3l8za4u8oReMO2KBnJC/TPhKUJrpFXjhdijIPlGf0m3szNvYMf5sTX9jZzmgt51IC 5iJqg/y+VYDkTX+KgrBMNjDQx7/7XawQE4dZZs67u+y7Zly/szdXv08+Bep/jT8ka27y EqZNidocuQlCMXfXhE5UWI3U1T2F5CJyJ5FwCA29AkrJSwr81kKSOBnLf6bA6wVaJeCw SXw7dtblPmuwI57yscrVdCV9ASYQVO3BnCq3QejLp31D3eKMKADUfhC2qCwD4nlhJls+ uqKeAQXO/lIUZuJYNpOLCkOpF25RomK8K46HkNrmkvz6RdZgVSpyv7H3Cnv2pq8+GcAL XXlw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id dd14si10039765ejb.163.2019.10.23.13.24.54; Wed, 23 Oct 2019 13:25:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392115AbfJWOQS (ORCPT + 99 others); Wed, 23 Oct 2019 10:16:18 -0400 Received: from mga11.intel.com ([192.55.52.93]:2488 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2392108AbfJWOQS (ORCPT ); Wed, 23 Oct 2019 10:16:18 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Oct 2019 07:16:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,221,1569308400"; d="scan'208";a="201148183" Received: from sjchrist-coffee.jf.intel.com (HELO linux.intel.com) ([10.54.74.41]) by orsmga003.jf.intel.com with ESMTP; 23 Oct 2019 07:16:16 -0700 Date: Wed, 23 Oct 2019 07:16:16 -0700 From: Sean Christopherson To: Thomas Gleixner Cc: LKML , x86@kernel.org, Peter Zijlstra , Andy Lutomirski , Will Deacon , Paolo Bonzini , kvm@vger.kernel.org, linux-arch@vger.kernel.org, Mike Rapoport , Josh Poimboeuf , Miroslav Benes Subject: Re: [patch V2 05/17] x86/traps: Make interrupt enable/disable symmetric in C code Message-ID: <20191023141616.GE329@linux.intel.com> References: <20191023122705.198339581@linutronix.de> <20191023123118.084086112@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191023123118.084086112@linutronix.de> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 23, 2019 at 02:27:10PM +0200, Thomas Gleixner wrote: > Traps enable interrupts conditionally but rely on the ASM return code to > disable them again. That results in redundant interrupt disable and trace > calls. > > Make the trap handlers disable interrupts before returning to avoid that, > which allows simplification of the ASM entry code. > > Originally-by: Peter Zijlstra > Signed-off-by: Thomas Gleixner > --- Reviewed-by: Sean Christopherson