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Bottomley" , linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v3 2/2] scsi: ufs-qcom: enter and exit hibern8 during clock scaling Date: Wed, 23 Oct 2019 09:49:09 -0700 Message-Id: <1571849351-819-2-git-send-email-asutoshd@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1571849351-819-1-git-send-email-asutoshd@codeaurora.org> References: <1571849351-819-1-git-send-email-asutoshd@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Qualcomm controller needs to be in hibern8 before scaling clocks. This change puts the controller in hibern8 state before scaling and brings it out after scaling of clocks. Signed-off-by: Asutosh Das --- drivers/scsi/ufs/ufs-qcom.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c index a5b7148..55b1de5 100644 --- a/drivers/scsi/ufs/ufs-qcom.c +++ b/drivers/scsi/ufs/ufs-qcom.c @@ -1305,18 +1305,27 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, int err = 0; if (status == PRE_CHANGE) { + err = ufshcd_uic_hibern8_enter(hba); + if (err) + return err; if (scale_up) err = ufs_qcom_clk_scale_up_pre_change(hba); else err = ufs_qcom_clk_scale_down_pre_change(hba); + if (err) + ufshcd_uic_hibern8_exit(hba); + } else { if (scale_up) err = ufs_qcom_clk_scale_up_post_change(hba); else err = ufs_qcom_clk_scale_down_post_change(hba); - if (err || !dev_req_params) + + if (err || !dev_req_params) { + ufshcd_uic_hibern8_exit(hba); goto out; + } ufs_qcom_cfg_timers(hba, dev_req_params->gear_rx, @@ -1324,6 +1333,7 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, dev_req_params->hs_rate, false); ufs_qcom_update_bus_bw_vote(host); + ufshcd_uic_hibern8_exit(hba); } out: -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.