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[209.132.180.67]) by mx.google.com with ESMTP id 19si4993756edz.85.2019.10.24.14.38.44; Thu, 24 Oct 2019 14:39:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=NVwK2wzK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437561AbfJXF1u (ORCPT + 99 others); Thu, 24 Oct 2019 01:27:50 -0400 Received: from mail-wm1-f65.google.com ([209.85.128.65]:32970 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2437533AbfJXF1r (ORCPT ); Thu, 24 Oct 2019 01:27:47 -0400 Received: by mail-wm1-f65.google.com with SMTP id 6so1158902wmf.0; Wed, 23 Oct 2019 22:27:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=r/3m8yVlp3IftHGnBzL00thvcpnAHjKPgAOc8BVz5Sg=; b=NVwK2wzK46s5iSwY1pkocCVDUpy16wHtNDM3k55829LrMyzIxfpy86cs25faBZ8KxN SrfLFOnx3uKmwg+NwmbPnzkb75BSGFMkGIjNItM5JLxRyQixKg/EUMzRnlriNCIC5z23 f111b/IOeFrpG8HF1KUlqO2wlZVSo6ebv723pehGTVsGZBessbNv9ygIlpvkbrpyApJG CX0lIFN8BuFgoahyzJXtoLoePrOopzMtPJlSvHjgobYHONEDqkL9LlxbQadC2GnnLhrj zby0adr2oy9AnFJaDznKe0CrbxFwbnR8zxBUqW0Q2o9iGLIdKJ2yEiRX/DUec7AVo8Bm COug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=r/3m8yVlp3IftHGnBzL00thvcpnAHjKPgAOc8BVz5Sg=; b=OGkIIm3i7fPXExJnekKvu4nlkS5Gz0mXTvjpYuv1qtUfmSBBCmAj60fz68mm8VuHzQ UUfg1pOF7AfbbkMP10kbeoU9EpkbYBFOrY/cx/0FtqWHQsZHRs5vrkrjv8C6SGpYmKr8 kX8hP4zIXdUUdFo9INr7CbA89QqWjuhbSBWM8JfSYoYDATi7qVUaY4JAmP/ndCqhkhy9 P+pwWciGlQjzkikXP2OqyhWw1I9DmkoZb0OGRl9A1H8EGxza0uSK0WC+kY5jyIaS2THp FZLI/1EMZJeYO8GHRmZRDEGlyafoqWklLqdpab9RoQyExgnhaEa60Mf2I80G4trHmu6k FV5A== X-Gm-Message-State: APjAAAUDjfbBAUUWMi7tYgB/Py5BdBsxhWSHQ5KMssgusFxSECmS4WKd ucZADJw2GyQMGebKhoNTl43ZiDkIFiyFpVAfciM= X-Received: by 2002:a1c:4456:: with SMTP id r83mr2924831wma.2.1571894864264; Wed, 23 Oct 2019 22:27:44 -0700 (PDT) MIME-Version: 1.0 References: <1571222654-12315-1-git-send-email-chunyan.zhang@unisoc.com> In-Reply-To: <1571222654-12315-1-git-send-email-chunyan.zhang@unisoc.com> From: Chunyan Zhang Date: Thu, 24 Oct 2019 13:27:08 +0800 Message-ID: Subject: Re: [PATCH] clk: sprd: change to implement .prepare instead of .enable To: Chunyan Zhang Cc: Stephen Boyd , Linux Kernel Mailing List , linux-clk , Orson Zhai , Baolin Wang , Xiaolong Zhang Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Please ignore this patch, and sorry for the noise. I will resend this along with another patch. Thanks, Chunyan On Wed, 16 Oct 2019 at 18:44, Chunyan Zhang wrote: > > > From: Xiaolong Zhang > > Some pll_sc_gate clocks need to wait a certain long time for being stable > after enabled, for this reason enabling this kind of clocks shouldn't be > done in clk_ops.enable() which would be called at interrupt context. So > we move the operation to .prepare(), and also hooks to .unprepare() with > disabling pll_sc_gate clocks. > > Signed-off-by: Xiaolong Zhang > Signed-off-by: Chunyan Zhang > --- > drivers/clk/sprd/gate.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/sprd/gate.c b/drivers/clk/sprd/gate.c > index 1491c00575fa..d8b480f852f3 100644 > --- a/drivers/clk/sprd/gate.c > +++ b/drivers/clk/sprd/gate.c > @@ -80,7 +80,7 @@ static int sprd_sc_gate_enable(struct clk_hw *hw) > return 0; > } > > -static int sprd_pll_sc_gate_enable(struct clk_hw *hw) > +static int sprd_pll_sc_gate_prepare(struct clk_hw *hw) > { > struct sprd_gate *sg = hw_to_sprd_gate(hw); > > @@ -120,9 +120,11 @@ const struct clk_ops sprd_sc_gate_ops = { > }; > EXPORT_SYMBOL_GPL(sprd_sc_gate_ops); > > +#define sprd_pll_sc_gate_unprepare sprd_sc_gate_disable > + > const struct clk_ops sprd_pll_sc_gate_ops = { > - .disable = sprd_sc_gate_disable, > - .enable = sprd_pll_sc_gate_enable, > + .unprepare = sprd_pll_sc_gate_unprepare, > + .prepare = sprd_pll_sc_gate_prepare, > .is_enabled = sprd_gate_is_enabled, > }; > EXPORT_SYMBOL_GPL(sprd_pll_sc_gate_ops); > -- > 2.20.1 > >