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[209.132.180.67]) by mx.google.com with ESMTP id q5si1745793eju.387.2019.10.25.12.01.32; Fri, 25 Oct 2019 12:02:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@googlemail.com header.s=20161025 header.b=snuxE3aH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=googlemail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2392941AbfJXT73 (ORCPT + 99 others); Thu, 24 Oct 2019 15:59:29 -0400 Received: from mail-ot1-f65.google.com ([209.85.210.65]:42955 "EHLO mail-ot1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726060AbfJXT73 (ORCPT ); Thu, 24 Oct 2019 15:59:29 -0400 Received: by mail-ot1-f65.google.com with SMTP id b16so74314otk.9; Thu, 24 Oct 2019 12:59:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=x0F8kOEXNZOfO+KIT0hQfdKv4yLZvQqLGUo1yR7k0NA=; b=snuxE3aHoCZdXiCfya3k+KjX1hRdlD81yjj5m/zXuf5AkSmy4EOBjVolf3jlV5YW9D Fjjr3kLr3wloPS2UonX0HIUFkETx2i5bJ/JX6BKqwshEBRgw2BVj0qGwvZgMPqGRRY3g TxBw8H6kjqwMKbYCQYhiB0uXC4la7Rfu8uoD9LCHXKAvZeNloqkQnej4z7VrR/YbhY6i 0zeggDxB2WzPZqRZxlZ3lnORVRDURl7L8gC9WUYD2udicNGwo5g1QFsiLq3uR7Hgbtdv U2x36BuSqPfEeybobiQOJG9I5OfV1Zu/u1cOaAuqqvo2XIb7kF1mrYudZ0TjtwZtZLwR 3CyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=x0F8kOEXNZOfO+KIT0hQfdKv4yLZvQqLGUo1yR7k0NA=; b=arc5PvR1REhKWHtx/CQ++UvaTLHEYw3TR/vMz6TjACaw8qmnPBMr3/RhZj8tIg+r+G bM6H0BOhVuIWutp1G4LxEkUJXk4reYUQm7btgwjEfW0rooQczga6Ri478GhcMWTOWDce XRkaiEBNxc+2ABbnmjV2xYxz3wSs5FdmuSbIpWh1SXYDyNdFPy1A2FV+7OLEAtV80VAN kapCXQR1bMU3PlwDiMtA8lH0bo4pJTPFAQsEwWnfCl2/JQxp70E3NNKIL+fOwca3yf5C 5iJQVxWq3i7gL4jgc9HC7hT3VY+162lG5Sx2o41amDMdQddsfxYkHaZX6BZM0MJuWsFD xy7A== X-Gm-Message-State: APjAAAUcgXo5ktPefcV+mRefW5rQnxvFa1HtSRAjus1qDVjR3JOlpAx+ 9wd26Nf4S54WxvoZ0xUsYSheNIOJRl5i58JtnKM= X-Received: by 2002:a05:6830:13d8:: with SMTP id e24mr5940324otq.42.1571947168180; Thu, 24 Oct 2019 12:59:28 -0700 (PDT) MIME-Version: 1.0 References: <20191021132322.25256-1-narmstrong@baylibre.com> In-Reply-To: <20191021132322.25256-1-narmstrong@baylibre.com> From: Martin Blumenstingl Date: Thu, 24 Oct 2019 21:59:17 +0200 Message-ID: Subject: Re: [PATCH] dt-bindings: usb: dwc3: Move Amlogic G12A DWC3 Glue Bindings to YAML schemas To: Neil Armstrong Cc: robh+dt@kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Neil, On Mon, Oct 21, 2019 at 3:23 PM Neil Armstrong wrote: [...] > diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml > new file mode 100644 > index 000000000000..45bcc98ee9a4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml > @@ -0,0 +1,132 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2019 BayLibre, SAS > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic Meson G12A DWC3 USB SoC Controller Glue > + > +maintainers: > + - Neil Armstrong > + > +description: | > + The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3 > + in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode > + only. > + > + A glue connects the DWC3 core to USB2 PHYs and optionnaly to an USB3 PHY. optionnaly -> optionally > + > + One of the USB2 PHY can be re-routed in peripheral mode to a DWC2 USB IP. One of the USB2 PHYs... with these two fixed: Reviewed-by: Martin Blumenstingl [...] > + phy-names: > + items: > + - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used > + - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used > + - const: usb3-phy0 # USB3 PHY if USB3_0 is used > + > + phys: > + minItems: 1 > + maxItems: 3 (off-topic and probably a question for Rob: do you know the validation mechanism knows that phys and phy-names belong together. so if one phy is omitted then phy-names can be shorter than 3 entries?) Martin