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[209.132.180.67]) by mx.google.com with ESMTP id t8si2424507edc.387.2019.10.25.12.26.04; Fri, 25 Oct 2019 12:26:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jA+Rztwl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406854AbfJYHTh (ORCPT + 99 others); Fri, 25 Oct 2019 03:19:37 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:43378 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406840AbfJYHTh (ORCPT ); Fri, 25 Oct 2019 03:19:37 -0400 Received: by mail-pg1-f196.google.com with SMTP id l24so934819pgh.10 for ; Fri, 25 Oct 2019 00:19:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=q/L5barERqVFMTFfN0b6H579EvN6zcwOea9h6lqu9TU=; b=jA+RztwlIRbtjSU68kRpA2ZIbp7Z82H7Ep+NCRgSH/XbwFrjiFSWj1sx9tsPmGMg1X d2heW0dH4SRFFmnbtO2Z305mH6zxY0MXPE+vCl5Evrv27b1xQpk0EpteXUb0PcQZ1nq9 TJjCnkyoTVpcoJ/HCPPP/rj1w0DVo0z0i1tDp3oEZkcRKx+o/bWn8JxvU4qk6J5C3UGQ Rs4HDa/ok1nDwrD678/T10v5+lfpftkP7glX7J327ie3U67YzwyqDypLc8vapRc0ukQC 8CqzOiCS5ZsEGGtmaoPKVrCrOgXWzlklX8xqMgA/zORW289Vu1HrGy2VUImfUCrlNG3E xqZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=q/L5barERqVFMTFfN0b6H579EvN6zcwOea9h6lqu9TU=; b=KEh8X4G9zU4bOY08Uh0bVIZbJ+URkaYkGqgqj5Squ2emY8qRWZjWcaLCqZ9JyKo0wF CxD79VJfrN+JPaDi0YWC1B1ZPOV3Szulo4TzOVcB+rLMIE7msXEChkpF7g+4ZdyD3zMj F4/r3rf8k3I8AqmaFkIKApMBC3ZSw+imu5d8YpiR51oowIlib8DKYQM9ttz9gp6uIm23 dDEkQao8Z3aiTQ9id8KeQPT3v/KnD9d/s9KgAd8hYKlBzC8/qezRYxJbCrY8mQnl5RKE yndaaW27zmSIJdjaN78/L6iUjhUKmJkzAmapM4NhDfY4l5Th/+lASJ2pAT3nf7Ey5wfZ uFjA== X-Gm-Message-State: APjAAAXSMqABPBsetZ9lgD71jzbb+Uk422Z9VrHELjKNmt6pNR+jORcm Z86r8w6QaRaCrPB8bS/c1HIs X-Received: by 2002:a63:e145:: with SMTP id h5mr2507155pgk.447.1571987976406; Fri, 25 Oct 2019 00:19:36 -0700 (PDT) Received: from mani ([103.59.133.81]) by smtp.gmail.com with ESMTPSA id n72sm1438916pjc.4.2019.10.25.00.19.32 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Oct 2019 00:19:35 -0700 (PDT) Date: Fri, 25 Oct 2019 12:49:27 +0530 From: Manivannan Sadhasivam To: Marco Felsch Cc: shawnguo@kernel.org, s.hauer@pengutronix.de, robh+dt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, darshak.patel@einfochips.com, linux-imx@nxp.com, kernel@pengutronix.de, festevam@gmail.com, linux-arm-kernel@lists.infradead.org, prajose.john@einfochips.com Subject: Re: [PATCH 1/3] dt-bindings: arm: Add devicetree binding for Thor96 Board Message-ID: <20191025071927.GA19873@mani> References: <20191024144235.3182-1-manivannan.sadhasivam@linaro.org> <20191024144235.3182-2-manivannan.sadhasivam@linaro.org> <20191025062659.fyze6zt4jg6uzqxz@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191025062659.fyze6zt4jg6uzqxz@pengutronix.de> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marco, On Fri, Oct 25, 2019 at 08:26:59AM +0200, Marco Felsch wrote: > Hi Manivannan, > > On 19-10-24 20:12, Manivannan Sadhasivam wrote: > > Add devicetree binding for Thor96 Board from Einfochips. This board is > > one of the 96Boards Consumer Edition platform powered by NXP i.MX8MQ SoC. > > > > Signed-off-by: Manivannan Sadhasivam > > --- > > Documentation/devicetree/bindings/arm/fsl.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml > > index 1b4b4e6573b5..8016174d5e49 100644 > > --- a/Documentation/devicetree/bindings/arm/fsl.yaml > > +++ b/Documentation/devicetree/bindings/arm/fsl.yaml > > @@ -239,6 +239,7 @@ properties: > > items: > > - enum: > > - boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board > > + - einfochips,imx8mq-thor96 # i.MX8MQ Thor96 Board > > Do we need to add a vendor patch too? > Do you mean a patch for adding vendor prefix? If yes, then I have added it already for AI_ML board and it is in mainline now! https://elixir.bootlin.com/linux/v5.4-rc2/source/Documentation/devicetree/bindings/vendor-prefixes.yaml#L276 Thanks, Mani > Regards, > Marco > > > - fsl,imx8mq-evk # i.MX8MQ EVK Board > > - purism,librem5-devkit # Purism Librem5 devkit > > - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse > > -- > > 2.17.1 > > > > > > > > -- > Pengutronix e.K. | | > Industrial Linux Solutions | http://www.pengutronix.de/ | > Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |