Received: by 2002:a25:d7c1:0:0:0:0:0 with SMTP id o184csp4066973ybg; Fri, 25 Oct 2019 12:50:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqzffemOZpPOpBzb+0l/2Q61N67nUT0ejoS0R1qwkr7/dfIVQ7UIOQujbw8izEJ31AruuzGA X-Received: by 2002:a05:6402:304c:: with SMTP id bu12mr5799783edb.230.1572033047262; Fri, 25 Oct 2019 12:50:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572033047; cv=none; d=google.com; s=arc-20160816; b=wO/nyb//5Q4SYYnlNfmtUoI9VNrSpyTYHJTcveWDMsmkU728vD7NjZ+Kg7vcb2ZVU9 b4xl3ASOl8Tgg+B3XJUx+4H17Lib9yEf3ZfaFL40CnCeHH+Lpz2aONms/H/h9AuHItSW CravDKvv9yI2EY12XPj1Oa0iO1D4CD69ARQpE+FyGNNJ/dF7zQH0AZk1Wv7iVPbWRQTv peO0PprCCki14ZM+NxPMBrk2wkOx4iep8agVovfBM7+oxcplrMkcDNXXgfCUuUXd9iOf 9ifKH1M7tIRhn9WWJJk4CJWkwyAGfyKJ4HJrWm3RUBPw5cY55ucoFt47UFVyQ1hRLjQE 3ifA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=yPVZvxuNXBZAsxalNc6IdGmjwLYCY6cJmyBXPgkPBqI=; b=eOowNywsd9t0qtERGsvc55X8s5T3YXjHOnxAaYJbK6iPt0hpuNBEkimtwNqTsVR9Yn Uv74IuwdDGGPwhnk9A2kkj/evOvX1uBOnCVQtYHVblKG2V2xrXM4EeIXoDsg1Yj8c+mf 3rEttJvb3bCyTFxqc8dz21hiZy3Hv5rAthsrh5wB0WzRDPhN73Nhuf6Ebz0NKN3ItCTX b9Jmf8ETyvaWEw+5tOiJfBkcNCmGnNzow/BtZyfWPZMKSdGwUmIN7fCWRmercm0lI+51 MnVFdG3g1meSEI5BEjL+UjbrGyg1flh8VQCHGos4dZP0AcN1LfNwr4cJzOwXnnfdQ1dN EDfQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id rk26si1798696ejb.303.2019.10.25.12.50.24; Fri, 25 Oct 2019 12:50:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2439742AbfJYLOY (ORCPT + 99 others); Fri, 25 Oct 2019 07:14:24 -0400 Received: from mx1.unisoc.com ([222.66.158.135]:38588 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2439123AbfJYLOX (ORCPT ); Fri, 25 Oct 2019 07:14:23 -0400 Received: from ig2.spreadtrum.com (bjmbx01.spreadtrum.com [10.0.64.7]) by SHSQR01.spreadtrum.com with ESMTPS id x9PBDrCR066405 (version=TLSv1 cipher=AES256-SHA bits=256 verify=NO); Fri, 25 Oct 2019 19:13:53 +0800 (CST) (envelope-from Chunyan.Zhang@unisoc.com) Received: from localhost (10.0.74.79) by BJMBX01.spreadtrum.com (10.0.64.7) with Microsoft SMTP Server (TLS) id 15.0.847.32; Fri, 25 Oct 2019 19:13:53 +0800 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: , , , Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [PATCH 0/5] Add clocks for Unisoc's SC9863A Date: Fri, 25 Oct 2019 19:13:33 +0800 Message-ID: <20191025111338.27324-1-chunyan.zhang@unisoc.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.0.74.79] X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To BJMBX01.spreadtrum.com (10.0.64.7) X-MAIL: SHSQR01.spreadtrum.com x9PBDrCR066405 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add SC9863A specific clock driver and devicetree bindings for it. Also this patchset added support gate clock for pll which need to wait a certain time for stable after being switched on. Chunyan Zhang (4): dt-bindings: clk: sprd: rename the common file name sprd.txt to SoC specific dt-bindings: clk: sprd: add bindings for sc9863a clock controller clk: sprd: Add dt-bindings include file for SC9863A clk: sprd: add clocks support for SC9863A Xiaolong Zhang (1): clk: sprd: add gate for pll clocks .../clock/{sprd.txt => sprd,sc9860-clk.txt} | 2 +- .../bindings/clock/sprd,sc9863a-clk.txt | 59 + drivers/clk/sprd/Kconfig | 8 + drivers/clk/sprd/Makefile | 1 + drivers/clk/sprd/gate.c | 19 + drivers/clk/sprd/gate.h | 21 +- drivers/clk/sprd/sc9863a-clk.c | 1711 +++++++++++++++++ include/dt-bindings/clock/sprd,sc9863a-clk.h | 353 ++++ 8 files changed, 2171 insertions(+), 3 deletions(-) rename Documentation/devicetree/bindings/clock/{sprd.txt => sprd,sc9860-clk.txt} (98%) create mode 100644 Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.txt create mode 100644 drivers/clk/sprd/sc9863a-clk.c create mode 100644 include/dt-bindings/clock/sprd,sc9863a-clk.h -- 2.20.1