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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id z13sm3550450pfg.172.2019.10.25.14.10.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 25 Oct 2019 14:10:36 -0700 (PDT) Date: Fri, 25 Oct 2019 14:10:14 -0700 From: Nicolin Chen To: Shengjiu Wang Cc: timur@kernel.org, Xiubo.Lee@gmail.com, festevam@gmail.com, broonie@kernel.org, alsa-devel@alsa-project.org, lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V2] ASoC: fsl_esai: Add spin lock to protect reset, stop and start Message-ID: <20191025211013.GA15101@Asurada-Nvidia.nvidia.com> References: <36e1d0157d2b71985b88e841d416d04c584c04fe.1571986436.git.shengjiu.wang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <36e1d0157d2b71985b88e841d416d04c584c04fe.1571986436.git.shengjiu.wang@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 25, 2019 at 03:13:53PM +0800, Shengjiu Wang wrote: > xrun may happen at the end of stream, the > trigger->fsl_esai_trigger_stop maybe called in the middle of > fsl_esai_hw_reset, this may cause esai in wrong state > after stop, and there may be endless xrun interrupt. > > This issue may also happen with trigger->fsl_esai_trigger_start. > > So Add spin lock to lock those functions. > > Fixes: 7ccafa2b3879 ("ASoC: fsl_esai: recover the channel swap after xrun") > Signed-off-by: Shengjiu Wang Some small comments inline. Once they are addressed, please add: Acked-by: Nicolin Chen Thanks > --- > Change in v2 > -add lock for fsl_esai_trigger_start. > > sound/soc/fsl/fsl_esai.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c > index 37b14c48b537..9b28e2af26e4 100644 > --- a/sound/soc/fsl/fsl_esai.c > +++ b/sound/soc/fsl/fsl_esai.c > @@ -33,6 +33,7 @@ > * @fsysclk: system clock source to derive HCK, SCK and FS > * @spbaclk: SPBA clock (optional, depending on SoC design) > * @task: tasklet to handle the reset operation > + * @lock: spin lock to handle reset and stop behavior Should be "between hw_reset() and trigger()" now. > * @fifo_depth: depth of tx/rx FIFO > * @slot_width: width of each DAI slot > * @slots: number of slots > @@ -56,6 +57,7 @@ struct fsl_esai { > struct clk *fsysclk; > struct clk *spbaclk; > struct tasklet_struct task; > + spinlock_t lock; /* Protect reset and stop */ We can drop the comments here since you add it to the top.