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Date:   Mon, 28 Oct 2019 10:52:57 +0000
Message-ID: <86y2x5xhti.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Zenghui Yu <yuzenghui@huawei.com>
Cc:     <kvmarm@lists.cs.columbia.edu>, <linux-kernel@vger.kernel.org>,
        Eric Auger <eric.auger@redhat.com>,
        James Morse <james.morse@arm.com>,
        Julien Thierry <julien.thierry.kdev@gmail.com>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Jason Cooper <jason@lakedaemon.net>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        "Andrew Murray" <Andrew.Murray@arm.com>,
        Jayachandran C <jnair@marvell.com>,
        "Robert Richter" <rrichter@marvell.com>
Subject: Re: [PATCH v2 04/36] irqchip/gic-v3-its: Make is_v4 use a TYPER copy
In-Reply-To: <9cd5e4d7-b0cf-8ad3-7b0c-f1177a106371@huawei.com>
References: <20191027144234.8395-1-maz@kernel.org>
        <20191027144234.8395-5-maz@kernel.org>
        <9cd5e4d7-b0cf-8ad3-7b0c-f1177a106371@huawei.com>
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On Mon, 28 Oct 2019 09:34:42 +0000,
Zenghui Yu <yuzenghui@huawei.com> wrote:
> 
> Hi Marc,
> 
> On 2019/10/27 22:42, Marc Zyngier wrote:
> > Instead of caching the GICv4 compatibility in a discrete way, cache the
> > TYPER register instead, which can then be used to implement the same
> > functionnality. This will get used more extensively in subsequent patches.
> > 
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> 
> nit: You may need to rebase some patches on top of mainline when
> you finally decide to take them in, i.e., as we currently have
> get_its_list(), which will use the legacy its->is_v4.

Yeah, I was planning on rebasing the whole irqchip-next branch on top
of -rc5 to avoid this kind of problems.

> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>

Thanks for that.

	M.

-- 
Jazz is not dead, it just smells funny.