Received: by 2002:a25:d7c1:0:0:0:0:0 with SMTP id o184csp3562203ybg; Mon, 28 Oct 2019 15:01:38 -0700 (PDT) X-Google-Smtp-Source: APXvYqx5w104KebN1UGvPaY/YdO/lIFqPBXAhYedE/lj2RxkC24Zt1o8o41Uq8vhePjaYmt4/FnO X-Received: by 2002:a17:906:4dc9:: with SMTP id f9mr79878ejw.23.1572300098641; Mon, 28 Oct 2019 15:01:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572300098; cv=none; d=google.com; s=arc-20160816; b=z0OK8AunMkBsq+TCvRvotV1WAwR8Wy7uSmLXSflgUks3PfdwcT4dwOomtyMK3pTMoH hbFAuea7JoKLS/dHSAc/AnVeRvOA6hGQiUYEU0n9eIaTAWuyQG1R8YsAVed39dtPaQHF Rz92ZBtzCypMbgET+MqNEXsyzxGQPh160TZXWs655LzUtc4QHJLHqZlj2eIusWxQAEFq gl6hxkuDVafY5HlgfE3j+z+97NheahnIpvjVjWapW6nD1fTofIpNx5MIOaYmc/T+S9l6 gDXGreLa6PS61lqXOceYxj9y97fti/wXbMTndCY2dwP+C7D6fLPqmf7eQGuvS3rshUtl l+xg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EJK//JMShkFomcxIL7CoEODYJVjSFbKnvbLo+tDSL6s=; b=B0RNtlONkUSbbFSueCR/AiY00KB4A98zBhV3XBmK5RLHmTtgPJuPwQh1M/KUOi32Nd s+6AsyDaNt4Lk9Th/R2faGqAR/u+oiDacuSxMtIkqo5V+TnxCh3zgqm/6J+8YdWediRo WLQUWBqbTwN6Gu9gaqAeZD2ns0rjViqQqmCzvsgr0ragI64PerhtxUJ95FM7Szauc+/4 N2yWpmpSSGSUKbbinudot4pOHo1e7w8v1R3Pr8OLcCZ7czwkllAns9eO9cFY23a4lEl2 EqQrwThpZqhlNrALShHTOkxIbSDrCKXEZt1eogKCBKwpjg9z9pD4+in24B7v+BcBEENq qxUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=e0SkayPO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h13si8126148edw.72.2019.10.28.15.01.14; Mon, 28 Oct 2019 15:01:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=e0SkayPO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728334AbfJ1SjK (ORCPT + 99 others); Mon, 28 Oct 2019 14:39:10 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:38536 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727034AbfJ1SjK (ORCPT ); Mon, 28 Oct 2019 14:39:10 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x9SIcx7w050187; Mon, 28 Oct 2019 13:38:59 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1572287939; bh=EJK//JMShkFomcxIL7CoEODYJVjSFbKnvbLo+tDSL6s=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=e0SkayPO8AaqkDK22GctXclDow5yC/QWxEeWFA9ttaSxrQfklU0Lb++tdZsIUNVh0 iN6yTeysjGG3wOS09SC8cri6+gPoSRQtZ9w7tjvu51TcTLg9tEVMlS3RmWJIIOHnz5 qzjqw6uLd12wffbKpvCHvKYV+m9Ssm72LFSc6njM= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x9SIcx1b104968 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 28 Oct 2019 13:38:59 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Mon, 28 Oct 2019 13:38:47 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Mon, 28 Oct 2019 13:38:47 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id x9SIcw26049480; Mon, 28 Oct 2019 13:38:58 -0500 From: Dan Murphy To: , CC: , , Dan Murphy , Rob Herring , Tony Lindgren , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Linus Walleij , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Subject: [PATCH v15 18/19] dt: bindings: Update lp55xx binding to recommended LED naming Date: Mon, 28 Oct 2019 13:36:28 -0500 Message-ID: <20191028183629.11779-19-dmurphy@ti.com> X-Mailer: git-send-email 2.22.0.214.g8dca754b1e In-Reply-To: <20191028183629.11779-1-dmurphy@ti.com> References: <20191028183629.11779-1-dmurphy@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update the LP55xx DT binding examples to the recommended node naming convention. There are no changes to the DT properties. Signed-off-by: Dan Murphy CC: Rob Herring CC: Tony Lindgren CC: "BenoƮt Cousson" CC: Linus Walleij CC: Shawn Guo CC: Sascha Hauer CC: Pengutronix Kernel Team CC: Fabio Estevam CC: NXP Linux Team --- .../devicetree/bindings/leds/leds-lp55xx.txt | 58 +++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-) diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt index 0ccc1efc2499..5475f45ef51f 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.txt +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.txt @@ -48,7 +48,7 @@ example 1) LP5521 'lp5521_pri:channel1' and 'lp5521_pri:channel2', with a heartbeat trigger on channel 0. -lp5521@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5521"; @@ -56,20 +56,20 @@ lp5521@32 { label = "lp5521_pri"; clock-mode = /bits/ 8 <2>; - chan@0 { + led@0 { reg = <0>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; linux,default-trigger = "heartbeat"; }; - chan@1 { + led@1 { reg = <1>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; }; - chan@2 { + led@2 { reg = <2>; led-cur = /bits/ 8 <0x2f>; max-cur = /bits/ 8 <0x5f>; @@ -88,70 +88,70 @@ ASEL1 ASEL0 Address VEN GND 34h VEN VEN 35h -lp5523@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "national,lp5523"; reg = <0x32>; clock-mode = /bits/ 8 <1>; - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; @@ -162,35 +162,35 @@ lp5523@32 { example 3) LP5562 4 channels are defined. -lp5562@30 { +led-controller@30 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp5562"; reg = <0x30>; clock-mode = /bits/8 <2>; - chan@0 { + led@0 { reg = <0>; chan-name = "R"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "G"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "B"; led-cur = /bits/ 8 <0x20>; max-cur = /bits/ 8 <0x60>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "W"; led-cur = /bits/ 8 <0x20>; @@ -202,7 +202,7 @@ example 4) LP8501 9 channels are defined. The 'pwr-sel' is LP8501 specific property. Others are same as LP5523. -lp8501@32 { +led-controller@32 { #address-cells = <1>; #size-cells = <0>; compatible = "ti,lp8501"; @@ -210,63 +210,63 @@ lp8501@32 { clock-mode = /bits/ 8 <2>; pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */ - chan@0 { + led@0 { reg = <0>; chan-name = "d1"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@1 { + led@1 { reg = <1>; chan-name = "d2"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@2 { + led@2 { reg = <2>; chan-name = "d3"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@3 { + led@3 { reg = <3>; chan-name = "d4"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@4 { + led@4 { reg = <4>; chan-name = "d5"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@5 { + led@5 { reg = <5>; chan-name = "d6"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@6 { + led@6 { reg = <6>; chan-name = "d7"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@7 { + led@7 { reg = <7>; chan-name = "d8"; led-cur = /bits/ 8 <0x14>; max-cur = /bits/ 8 <0x20>; }; - chan@8 { + led@8 { reg = <8>; chan-name = "d9"; led-cur = /bits/ 8 <0x14>; -- 2.22.0.214.g8dca754b1e