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[209.132.180.67]) by mx.google.com with ESMTP id p18si7099601ejw.198.2019.10.28.18.13.35; Mon, 28 Oct 2019 18:13:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732894AbfJ1J34 (ORCPT + 99 others); Mon, 28 Oct 2019 05:29:56 -0400 Received: from twhmllg4.macronix.com ([211.75.127.132]:61742 "EHLO TWHMLLG4.macronix.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731707AbfJ1J3z (ORCPT ); Mon, 28 Oct 2019 05:29:55 -0400 Received: from localhost.localdomain ([172.17.195.96]) by TWHMLLG4.macronix.com with ESMTP id x9S9TQPQ013435; Mon, 28 Oct 2019 17:29:30 +0800 (GMT-8) (envelope-from masonccyang@mxic.com.tw) From: Mason Yang To: miquel.raynal@bootlin.com, richard@nod.at, marek.vasut@gmail.com, dwmw2@infradead.org, bbrezillon@kernel.org, computersforpeace@gmail.com, vigneshr@ti.com Cc: juliensu@mxic.com.tw, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, masonccyang@mxic.com.tw Subject: [PATCH v2 4/4] mtd: rawnand: Add support Macronix deep power down mode Date: Mon, 28 Oct 2019 17:55:27 +0800 Message-Id: <1572256527-5074-5-git-send-email-masonccyang@mxic.com.tw> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1572256527-5074-1-git-send-email-masonccyang@mxic.com.tw> References: <1572256527-5074-1-git-send-email-masonccyang@mxic.com.tw> X-MAIL: TWHMLLG4.macronix.com x9S9TQPQ013435 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Macronix AD series support deep power down mode for a minimum power consumption state. Patch nand_suspend() & nand_resume() by Macronix specific deep power down mode command and exit it. Signed-off-by: Mason Yang --- drivers/mtd/nand/raw/nand_macronix.c | 72 +++++++++++++++++++++++++++++++++++- 1 file changed, 70 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/nand_macronix.c b/drivers/mtd/nand/raw/nand_macronix.c index 13929bf..3098bc0 100644 --- a/drivers/mtd/nand/raw/nand_macronix.c +++ b/drivers/mtd/nand/raw/nand_macronix.c @@ -15,6 +15,8 @@ #define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38 #define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0 +#define NAND_CMD_POWER_DOWN 0xB9 + struct nand_onfi_vendor_macronix { u8 reserved; u8 reliability_func; @@ -137,13 +139,66 @@ static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len) return ret; } +int nand_power_down_op(struct nand_chip *chip) +{ + int ret; + + if (nand_has_exec_op(chip)) { + struct nand_op_instr instrs[] = { + NAND_OP_CMD(NAND_CMD_POWER_DOWN, 0), + }; + + struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs); + + ret = nand_exec_op(chip, &op); + if (ret) + return ret; + + } else { + chip->legacy.cmdfunc(chip, NAND_CMD_POWER_DOWN, -1, -1); + } + + return 0; +} + +static int mxic_nand_suspend(struct nand_chip *chip) +{ + int ret; + + nand_select_target(chip, 0); + ret = nand_power_down_op(chip); + if (ret < 0) + pr_err("%s called for chip into suspend failed\n", __func__); + nand_deselect_target(chip); + + return ret; +} + +static void mxic_nand_resume(struct nand_chip *chip) +{ + /* + * Toggle #CS pin to resume NAND device and don't care + * of the others CLE, #WE, #RE pins status. + * Here sending power down command to toggle #CS line. + */ + nand_select_target(chip, 0); + nand_power_down_op(chip); + nand_deselect_target(chip); +} + /* - * Macronix NAND AC series support Block Protection by SET_FEATURES + * Macronix NAND AC & AD series support Block Protection by SET_FEATURES * to lock/unlock blocks. */ static int macronix_nand_init(struct nand_chip *chip) { - bool blockprotected = false; + unsigned int i; + bool blockprotected = false, powerdown = false; + static const char * const power_down_dev[] = { + "MX30LF1G28AD", + "MX30LF2G28AD", + "MX30LF4G28AD", + }; if (nand_is_slc(chip)) chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE; @@ -153,6 +208,14 @@ static int macronix_nand_init(struct nand_chip *chip) macronix_nand_onfi_init(chip); + for (i = 0; i < ARRAY_SIZE(power_down_dev); i++) { + if (!strcmp(power_down_dev[i], chip->parameters.model)) { + blockprotected = true; + powerdown = true; + break; + } + } + if (blockprotected) { bitmap_set(chip->parameters.set_feature_list, ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); @@ -163,6 +226,11 @@ static int macronix_nand_init(struct nand_chip *chip) chip->_unlock = mxic_nand_unlock; } + if (powerdown) { + chip->_suspend = mxic_nand_suspend; + chip->_resume = mxic_nand_resume; + } + return 0; } -- 1.9.1