Received: by 2002:a25:d7c1:0:0:0:0:0 with SMTP id o184csp3986098ybg; Mon, 28 Oct 2019 23:58:32 -0700 (PDT) X-Google-Smtp-Source: APXvYqw3EAbbjAlWJJLMIkGctqlsUDVPSWxiLD6Cg71fgAc2vT6gVfZ+boA+NKPsPpmna76ZlH/2 X-Received: by 2002:a50:88a6:: with SMTP id d35mr22519527edd.111.1572332312740; Mon, 28 Oct 2019 23:58:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572332312; cv=none; d=google.com; s=arc-20160816; b=CgGaIZdG78SyDqyVyc+pWZbrlrv7mJsrVXGWvWogFhgT7LuyRz7aWUFPQdQ0wxxEKo tUxSItqfkwNPVG8tvMzgFwIzTa6JNbI/0bpX/wXBWrFfqw6ewuuYT/13uStiaSm3Mr3g dztqitY1GWrj50S1OUP1noC4eREm1pSdhoe1OXLTBerd8L1TC3jV1DMJnZFDOj/FL5oz 8yEmzpSGXiQg4oegeahW0MeXO1yt4fpb1CnL6tkNbOaJPxG8hs2k5XGBzyPj9KDMJI6z pdIShmYUK8UxUNADsQNTy23NwhV02lChOUBv1HnZfTKsrq1qcQPo8WY+orrI3JtE41RG Ro3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-language :content-transfer-encoding:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject:dkim-signature; bh=6PbNC9ZYBewrGx4YYy/4pVIAWb+IMk+47XVy1Sx5zzI=; b=cpy9Y6vkH5njhPAe24rg8ewTci+JE6+TsXPX4hld5vNezOUH0tDJKZxxE9XGVAVwTG 0hRKfkqtaXE6JDv56TsDJtjB3WBXe5DsXRgZHNBdJE1L+pF1UpfEmpGMNfSdLxXyWrWk rQO0THBqnyssf1Z6cd9hAXDMWlyCDsWV6rOb+8eWtukPN0maLUt1Pxer1VbDQe5f64qG VxhwWZS+O4mCtPIIz3mBBiGbBE7tiqE0A0nk8xYJLDedljYp3CUzxX6NuezJPKDqKKOX +kgXyRDhGd6haT/abXH0clPe+aXpvsjfcIfQsJy9djlrQmkOdqf5JciKzr36kscE+F95 mXmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b="HYAW/Y0L"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 17si7423511ejx.213.2019.10.28.23.58.08; Mon, 28 Oct 2019 23:58:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b="HYAW/Y0L"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729551AbfJ1X7p (ORCPT + 99 others); Mon, 28 Oct 2019 19:59:45 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:40566 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725951AbfJ1X7p (ORCPT ); Mon, 28 Oct 2019 19:59:45 -0400 Received: by mail-pl1-f193.google.com with SMTP id p5so1389144plr.7; Mon, 28 Oct 2019 16:59:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding:content-language; bh=6PbNC9ZYBewrGx4YYy/4pVIAWb+IMk+47XVy1Sx5zzI=; b=HYAW/Y0L2chXTWqpU2iL0mEYEyFN8O5JV3K7uT5zi5MVAHM10rAzOumCdJH84zYxS+ 6KQq51xBpAp+0GQjRvOibReUcU59U3AUuy1kQUQ5CcdwbzgoBwp0KdeN6itX3xSo5UQt /mMMuxzxj/B7EGZayugehJU3wbrFEknjC+t+/sf5/LUs5Mr0rkWMLHvjdv6ao6IUbVCf mS/H6anHtrzQWKZmdnph7Hx4LDFc1h3T5W1gxadaykgczBZakktCleeu5MV+gy2d37/d ebNnz9/PmR6LKowLihYoAiAvHmgj3N+3IbUVfnIaVRrnL8N4c6OjMLxR/1QN5mTnFtKz 15Xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding :content-language; bh=6PbNC9ZYBewrGx4YYy/4pVIAWb+IMk+47XVy1Sx5zzI=; b=nzVcVyl5WJ9KjEHBs6JYoHAlCHcWk51sKAlew5lxYTUou5tIE9aVnEPO+r/fjyjuYM X2RUBriw6muwmQvaviBod0WQAhfUwRr2rOrqE95sI+oq2v4BueuhoZopBaPIYmA/YDcZ yYK6RlxOQkJU+jX8NGE+tiIf+sHN3S878XixHj760CqgbqFGHolioazrSYx2zC0xOFUS f/KfT79YR/HhbxxFZt/duAcs7EOKpA8aTuUZnnesB2rq70RpqVrjHers2T9VtrMSTunM L8s64pnmTwFSn8CekXc+yiWVn4XC9Q2s0CqUgVNUWDPLuHaBN4buyvcZJ0/Z+jHxJcYc /Lpw== X-Gm-Message-State: APjAAAU3Dr/zQ4g8kFLPAuTgfEmm/eVsRuzLycqp+2OeGKohHvHh0QOL ZkN4Bo1dc4W7OvSElFluZH8= X-Received: by 2002:a17:902:7089:: with SMTP id z9mr751398plk.51.1572307184139; Mon, 28 Oct 2019 16:59:44 -0700 (PDT) Received: from [172.30.89.111] (sjewanfw1-nat.mentorg.com. [139.181.7.34]) by smtp.gmail.com with ESMTPSA id r33sm579115pjb.5.2019.10.28.16.59.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 28 Oct 2019 16:59:43 -0700 (PDT) Subject: Re: [PATCH 2/2] dt-bindings: timer: imx: gpt: Add pin group bindings for input capture To: Rob Herring Cc: Daniel Lezcano , Thomas Gleixner , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , "open list:CLOCKSOURCE, CLOCKEVENT DRIVERS" , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" References: <20191016010544.14561-1-slongerbeam@gmail.com> <20191016010544.14561-3-slongerbeam@gmail.com> <20191027212121.GA3049@bogus> From: Steve Longerbeam Message-ID: <2daa37a6-83a7-ec08-b89c-a07268b3ea4a@gmail.com> Date: Mon, 28 Oct 2019 16:59:36 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: <20191027212121.GA3049@bogus> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, Thanks for reviewing. On 10/27/19 2:21 PM, Rob Herring wrote: > On Tue, Oct 15, 2019 at 06:05:44PM -0700, Steve Longerbeam wrote: >> Add pin group bindings to support input capture function of the i.MX >> GPT. >> >> Signed-off-by: Steve Longerbeam >> --- >> .../devicetree/bindings/timer/fsl,imxgpt.txt | 28 +++++++++++++++++++ >> 1 file changed, 28 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt >> index 5d8fd5b52598..32797b7b0d02 100644 >> --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt >> +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt >> @@ -33,6 +33,13 @@ Required properties: >> an entry for each entry in clock-names. >> - clock-names : must include "ipg" entry first, then "per" entry. >> >> +Optional properties: >> + >> +- pinctrl-0: For the i.MX GPT to support the Input Capture function, >> + the input capture channel pin groups must be listed here. >> +- pinctrl-names: must be "default". >> + >> + >> Example: >> >> gpt1: timer@10003000 { >> @@ -43,3 +50,24 @@ gpt1: timer@10003000 { >> <&clks IMX27_CLK_PER1_GATE>; >> clock-names = "ipg", "per"; >> }; >> + >> + >> +Example with input capture channel 0 support: >> + >> +pinctrl_gpt_input_capture0: gptinputcapture0grp { >> + fsl,pins = < >> + MX6QDL_PAD_SD1_DAT0__GPT_CAPTURE1 0x1b0b0 >> + >; >> +}; >> + >> +gpt: gpt@2098000 { > timer@... Ok. > > I don't really think this merits another example though. Ok. But for version 2 of this patch-set I'd like to run some ideas by you. Because in this version I did not make any attempt to create a generic timer capture framework. I just exported a couple imx-specific functions to request and free a timer input capture channel in the imx-gpt driver. So for version 2 I am thinking about a simple framework that other SoC timers with timer input capture support can make use of. To begin with I don't see that timer input capture warrants the definition of a new device. At least for imx, timer input capture is just one function of the imx GPT, where the other is Output Compare which is used for the system timer. I think that is likely the case for most all SoC timers, that is, input capture and output compare are tightly interwoven functions of general purpose timers. So I'm thinking there needs to be an additional #input-capture-cells property that defines how many input capture channels the timer contains, where a channel refers to a single input signal edge that can capture the timer counter. The imx GPT has two input capture channels (2 separate input signals). For example, on imx: gpt: timer@2098000 { compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; /* ... */ #input-capture-cells = <1>; pinctrl-names = "default", "icap1"; pinctrl-0 = <&pinctrl_gpt_input_capture0>; pinctrl-1 = <&pinctrl_gpt_input_capture1>; }; A device that is a listener/consumer of an timer capture event would then refer to a timer capture channel: some-device { /* ... */ timer-input-capture = <&gpt 0>; }; Is this a sound approach? Let me know what you think. Thanks, Steve