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[209.132.180.67]) by mx.google.com with ESMTP id z24si7403706ejb.118.2019.10.29.13.21.31; Tue, 29 Oct 2019 13:22:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@megous.com header.s=mail header.b=sSiBPKoF; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=megous.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727220AbfJ2URq (ORCPT + 99 others); Tue, 29 Oct 2019 16:17:46 -0400 Received: from vps.xff.cz ([195.181.215.36]:37752 "EHLO vps.xff.cz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726316AbfJ2URq (ORCPT ); Tue, 29 Oct 2019 16:17:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=megous.com; s=mail; t=1572380264; bh=ePhtkR66Peq9g6X0BIyrwjG1W5lySqs7mnK5Z77PYyY=; h=From:To:Cc:Subject:Date:References:From; b=sSiBPKoFw5BENHQLV0BAG/s0URjlaeWmLcJAbXbyTat2oTup/rxoUcQ3JOEiKYEMI yz/5IGmxjYGWBJjOfpfjpU5lvALjkX4Z+V6qeYv/Mt0toP2OZXM6BVvC2R66gfcfur WcyK9TX/J95dg//2CFs6joi+TfBBoGrbv7pvvBH4= From: Ondrej Jirman To: linux-sunxi@googlegroups.com, Kishon Vijay Abraham I , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Thomas Gleixner , Arnd Bergmann Cc: Ondrej Jirman , Greg Kroah-Hartman , Paul Kocialkowski , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Rob Herring Subject: [PATCH v3 1/4] dt-bindings: Add bindings for USB3 phy on Allwinner H6 Date: Tue, 29 Oct 2019 21:17:38 +0100 Message-Id: <20191029201741.3820913-2-megous@megous.com> In-Reply-To: <20191029201741.3820913-1-megous@megous.com> References: <20191029201741.3820913-1-megous@megous.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The new Allwinner H6 SoC contains a USB3 PHY that is wired to the external USB3 pins of the SoC. Add a device tree binding for the PHY. Signed-off-by: Ondrej Jirman Acked-by: Maxime Ripard Reviewed-by: Rob Herring --- .../phy/allwinner,sun50i-h6-usb3-phy.yaml | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml new file mode 100644 index 000000000000..e5922b427342 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 Ondrej Jirman +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Allwinner H6 USB3 PHY + +maintainers: + - Ondrej Jirman + +properties: + compatible: + enum: + - allwinner,sun50i-h6-usb3-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + "#phy-cells": + const: 0 + +required: + - compatible + - reg + - clocks + - resets + - "#phy-cells" + +examples: + - | + #include + #include + phy@5210000 { + compatible = "allwinner,sun50i-h6-usb3-phy"; + reg = <0x5210000 0x10000>; + clocks = <&ccu CLK_USB_PHY1>; + resets = <&ccu RST_USB_PHY1>; + #phy-cells = <0>; + }; -- 2.23.0