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Date:   Tue, 29 Oct 2019 18:22:39 +0000 (UTC)
From:   Paul Walmsley <paul@pwsan.com>
To:     Yash Shah <yash.shah@sifive.com>
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Subject: RE: [PATCH v2] RISC-V: Add PCIe I/O BAR memory mapping
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On Tue, 29 Oct 2019, Yash Shah wrote:

> > On Fri, 25 Oct 2019, Yash Shah wrote:
> > 
> > > For legacy I/O BARs (non-MMIO BARs) to work correctly on RISC-V Linux,
> > > we need to establish a reserved memory region for them, so that
> > > drivers that wish to use the legacy I/O BARs can issue reads and
> > > writes against a memory region that is mapped to the host PCIe
> > > controller's I/O BAR mapping.
> > >
> > > Signed-off-by: Yash Shah <yash.shah@sifive.com>
> > 
> > Thanks.  And just to confirm: this is a fix, right?  Without this 
> > patch, legacy PCIe I/O resources won't be accessible on RISC-V?
> 
> Yes, this is a fix.

Thanks, queued for v5.4-rc.


- Paul