Received: by 2002:a25:31c3:0:0:0:0:0 with SMTP id x186csp575391ybx; Wed, 30 Oct 2019 01:18:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqxZPJDj9YLjCyfBGxGzUrK9OwhFsqICW1WoR/0iKP/Xp6m03EqP2D9SH4IJ1glkqdLuel4i X-Received: by 2002:a05:6402:386:: with SMTP id o6mr31066546edv.148.1572423505387; Wed, 30 Oct 2019 01:18:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572423505; cv=none; d=google.com; s=arc-20160816; b=c1W/S5vsdE3GQcUeWXrlMBGLmk5+pjQsNRDchU6oFMyXeIR+Y28WKQ4Q7FrvmToeDD RsOIFrQua6PQ1mOBTh6FeKoihxBju3EU/GcspiZfH6007im0IRmqXEHn0qL+RjY2qWZ2 2/yG+oVaeHwm90oTmcrlrhTl8zvUUoNmj66Q6f9iy+tL5sb61hCymVYvr6h9LxU99XyH 60qSR0RXBS0dFI75OqApVecZKlQGPEemie903PRpIQOuZGul9IQfp7Z8wvUV9qRJ+ff1 FaN5Bg4YEgz9Dtx7/D4NBXeCpEI/7vsillNXiN8RnbqsxeEmNHRXaOIZdhKJVvqODWRg 2dfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:date:cc:to:from:subject:message-id; bh=GfHaOOW+CbTlhSsbCEJVZLc7sLDX/ddia1GDNxlLOKI=; b=VkjAibvmx8Vt7pqFShpIAqRcCIsvdHoufCIzadyqS2XrcFucD/NqV8gBthD0bjbXZF xElezB7CsWB8m2zsq/Q3eyhCZzomOZwlBD9LXjDy1KE5PmpDP3pNhxHz0rhoO1voxG4R Jz5TibkaaejoTlGkykCO3zt6h+Xkg6l4bQ6vHpjlV9S1d5PvMfnGsgvd4MUft2gADCs5 pBaLS04zgiI7d9D6ySsMZIVEiK1lhKwlBBSTkuNVf4Npdcisd6DUoino/NxTAFq65AFI xdjAFv+tx24dUcuiKAo94SVHS6J7n0C9ItGZWUXYg/VST7tBH+PwhTN0XFXdZPAQ7897 IrZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m12si751732ejc.123.2019.10.30.01.18.01; Wed, 30 Oct 2019 01:18:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726673AbfJ3IOz (ORCPT + 99 others); Wed, 30 Oct 2019 04:14:55 -0400 Received: from Mailgw01.mediatek.com ([1.203.163.78]:19059 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725822AbfJ3IOz (ORCPT ); Wed, 30 Oct 2019 04:14:55 -0400 X-UUID: 87125db8de6b42c8bcc2ee48db36e41b-20191030 X-UUID: 87125db8de6b42c8bcc2ee48db36e41b-20191030 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1946478619; Wed, 30 Oct 2019 16:14:49 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 30 Oct 2019 16:14:47 +0800 Received: from [10.17.3.153] (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 30 Oct 2019 16:14:46 +0800 Message-ID: <1572423288.18464.38.camel@mhfsdcap03> Subject: Re: [PATCH] usb: mtk-xhci: Set the XHCI_NO_64BIT_SUPPORT quirk From: Chunfeng Yun To: Tomasz Figa CC: Matthias Brugger , , Mathias Nyman , Greg Kroah-Hartman , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" , open list , Changqi Hu , Nicolas Boichat , Shik Chen Date: Wed, 30 Oct 2019 16:14:48 +0800 In-Reply-To: References: <20191010075004.192818-1-tfiga@chromium.org> <1570697118.32135.20.camel@mhfsdcap03> <1570705147.22261.13.camel@mhfsdcap03> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-TM-SNTS-SMTP: 60E1840DBE94508B2E5CDABD7A6FC01DE1971C6B2AD893D3FFBB7A973753CDDD2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tomasz, On Fri, 2019-10-11 at 13:35 +0900, Tomasz Figa wrote: > On Thu, Oct 10, 2019 at 7:59 PM Chunfeng Yun wrote: > > > > On Thu, 2019-10-10 at 18:00 +0900, Tomasz Figa wrote: > > > Hi Chunfeng, > > > > > > On Thu, Oct 10, 2019 at 5:45 PM Chunfeng Yun wrote: > > > > > > > > Hi, Tomasz, > > > > > > > > On Thu, 2019-10-10 at 16:50 +0900, Tomasz Figa wrote: > > > > > MediaTek XHCI host controller does not support 64-bit addressing despite > > > > > the AC64 bit of HCCPARAMS1 register being set. The platform-specific > > > > > glue sets the DMA mask to 32 bits on its own, but it has no effect, > > > > > because xhci_gen_setup() overrides it according to hardware > > > > > capabilities. > > Yes, this is what I want to do, maybe need remove DMA mask setting in > > platform-specific. > > > > > > > > > > > > Use the XHCI_NO_64BIT_SUPPORT quirk to tell the XHCI core to force > > > > > 32-bit DMA mask instead. > > > > > > > > > > Signed-off-by: Tomasz Figa > > > > > --- > > > > > drivers/usb/host/xhci-mtk.c | 10 +++++----- > > > > > 1 file changed, 5 insertions(+), 5 deletions(-) > > > > > > > > > > diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c > > > > > index b18a6baef204a..4d101d52cc11b 100644 > > > > > --- a/drivers/usb/host/xhci-mtk.c > > > > > +++ b/drivers/usb/host/xhci-mtk.c > > > > > @@ -395,6 +395,11 @@ static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci) > > > > > xhci->quirks |= XHCI_SPURIOUS_SUCCESS; > > > > > if (mtk->lpm_support) > > > > > xhci->quirks |= XHCI_LPM_SUPPORT; > > > > > + /* > > > > > + * MTK host controller does not support 64-bit addressing, despite > > > > > + * having the AC64 bit of the HCCPARAMS1 register set. > > > > > + */ > > > > > + xhci->quirks |= XHCI_NO_64BIT_SUPPORT; > > > > Somes SoCs support 64bits in fact, so can't support this quirk, do you > > > > encounter any issues without this quirk? > > > > > > > > > > Thanks for taking a look at this patch. > > > > > > Yes, on MT8183 the DMA mask ended up being set to 64 bits, but > > > according to the information I received from MediaTek, the controller > > > on that SoC only supports 32 bits. > > As I know, mt8183 doesn't support memory greater than 4G mode. > > > > We have 4GB of DRAM at 0x40000000-0x140000000 on our board with > MT8183. What happens if you attempt to use the memory from > 0x100000000-0x140000000 with the XHCI controller on this SoC? Sorry for the late reply. I've checked it with USB DE, USB IP supports 64bit on MT8183, so no need set XHCI_NO_64BIT_SUPPORT. Would you please help to send a new patch to remove local dma mask setting, no need set it. Thanks a lot > > > > > > > If some SoCs support only 32 bits and some support 64 bits, we may > > > either need to use different DT compatible string for them or add a DT > > > property and set the quirk based on that. Right now in upstream we > > > have: > > > > > > 1) "mediatek,mt8173-xhci", used by: > > > MT8173 > > > > > > 2)"mediatek,mtk-xhci", used by: > > > MT2712 > > > MT7622 > > > MT8183 (not yet upstream, but I suppose it's on the mailing lists) > > > > > > Would you be able to check which of the SoCs above report 64 bits but > > > support only 32? (and so would need this quirk) > > I'm afraid I can't, almost all MTK SoCs supporting xHCI are using this > > driver, AC64 should be set rightly according to addressing capability. > > > > Does it mean that only MT8183 may be the only SoC with a problem with > this capability bit? > > Matthias, do you have access to MT2712 and MT7622 devices? I have > MT8173 and MT8183, so I can check them, but would be good to check > this on the other ones too. > > Best regards, > Tomasz