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Fri, 1 Nov 2019 22:41:27 +0000 From: "Suthikulpanit, Suravee" To: "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" CC: "pbonzini@redhat.com" , "rkrcmar@redhat.com" , "joro@8bytes.org" , "vkuznets@redhat.com" , "rkagan@virtuozzo.com" , "graf@amazon.com" , "jschoenh@amazon.de" , "karahmed@amazon.de" , "rimasluk@amazon.com" , "Grimm, Jon" , "Suthikulpanit, Suravee" Subject: [PATCH v4 04/17] kvm: x86: Add support for activate/de-activate APICv at runtime Thread-Topic: [PATCH v4 04/17] kvm: x86: Add support for activate/de-activate APICv at runtime Thread-Index: AQHVkQV/8CsVLszkbEWXIyta1bn49A== Date: Fri, 1 Nov 2019 22:41:27 +0000 Message-ID: <1572648072-84536-5-git-send-email-suravee.suthikulpanit@amd.com> References: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com> In-Reply-To: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [165.204.78.1] x-clientproxiedby: SN1PR12CA0047.namprd12.prod.outlook.com (2603:10b6:802:20::18) To DM6PR12MB3865.namprd12.prod.outlook.com (2603:10b6:5:1c8::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Suravee.Suthikulpanit@amd.com; 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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: RM8ozn/O6UuWsB4NL38J98MZrfgVwaybSXwztKCYB3lgXpwb8hry6j6oYS46Gx0SqlkOWlVZbamHs8kR3Otk7wOSkQ1RO6UEOVfiY09dx/0bD14Ki+UxY5A7YHA3Wz5/NFjww4ou3eW+JySZGnZyZ9RsDINiBiOhvtq4Fi1kpvwMldNxMvErcJubIv5zlSQc3yxezizc8IHp/4+KYyngkoXXimROToR7WpeoZEG5ID+LLC4Z1U6qbdXcnPxuKUimnTSZZzOnXixu67iCMRdhJdlWAe69/xLJNXr54Yk4GfB0zhyma0wL9qraPnHjwo0DerzfYC9ROaWK32jPKhswfe2eSoMGxkSLL9FYBfWBqmBiOKyGnvjpXDJ/nVORMRTR5f3VSdO28bilJ+0j8oHQBXdUKAxLqwV6httk6nR0SdK4uu2unSJB7JHJPQxD2B+d Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 128825d7-37a7-461d-4bbd-08d75f1ca186 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Nov 2019 22:41:27.1749 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: hUE3CYyz1qWiA3NuXBmnsA7tjceiNqxuwSpj+3uVC0i0ArmtiOk7e7Ig6wwllGERUphf1TdJSwEIBxpq8vmm9Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3243 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Certain runtime conditions require APICv to be temporary deactivated. However, current implementation only support permanently deactivate APICv at runtime (mainly used when running Hyper-V synic). In addition, for AMD, when activate / deactivate APICv during runtime, all vcpus in the VM has to be operating in the same APICv mode, which requires the requesting (main) vcpu to notify others. So, introduce the following: * A new KVM_REQ_APICV_UPDATE request bit * Interfaces to request all vcpus to update (activate/deactivate) APICv * Interface to update APICV-related parameters for each vcpu Signed-off-by: Suravee Suthikulpanit --- arch/x86/include/asm/kvm_host.h | 5 +++++ arch/x86/kvm/x86.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 1c05363..3b94f42 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -78,6 +78,8 @@ #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) +#define KVM_REQ_APICV_UPDATE \ + KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) =20 #define CR0_RESERVED_BITS \ (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ @@ -1421,6 +1423,9 @@ gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu= , gva_t gva, void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); bool kvm_apicv_activated(struct kvm *kvm); void kvm_apicv_init(struct kvm *kvm, bool enable); +void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); +void kvm_request_apicv_update(struct kvm *kvm, bool activate, + unsigned long bit); =20 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); =20 diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 70a70a1..394695a 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -26,6 +26,7 @@ #include "cpuid.h" #include "pmu.h" #include "hyperv.h" +#include "lapic.h" =20 #include #include @@ -7730,6 +7731,33 @@ void kvm_make_scan_ioapic_request(struct kvm *kvm) kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC); } =20 +void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu) +{ + if (!lapic_in_kernel(vcpu)) + return; + + vcpu->arch.apicv_active =3D kvm_apicv_activated(vcpu->kvm); + kvm_apic_update_apicv(vcpu); + kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu); +} +EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv); + +void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit) +{ + if (activate) { + if (!test_and_clear_bit(bit, &kvm->arch.apicv_deact_msk) || + !kvm_apicv_activated(kvm)) + return; + } else { + if (test_and_set_bit(bit, &kvm->arch.apicv_deact_msk) || + kvm_apicv_activated(kvm)) + return; + } + + kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE); +} +EXPORT_SYMBOL_GPL(kvm_request_apicv_update); + static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu) { if (!kvm_apic_present(vcpu)) @@ -7916,6 +7944,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) */ if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu)) kvm_hv_process_stimers(vcpu); + if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu)) + kvm_vcpu_update_apicv(vcpu); } =20 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) { --=20 1.8.3.1