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From:   "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
To:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "kvm@vger.kernel.org" <kvm@vger.kernel.org>
CC:     "pbonzini@redhat.com" <pbonzini@redhat.com>,
        "rkrcmar@redhat.com" <rkrcmar@redhat.com>,
        "joro@8bytes.org" <joro@8bytes.org>,
        "vkuznets@redhat.com" <vkuznets@redhat.com>,
        "rkagan@virtuozzo.com" <rkagan@virtuozzo.com>,
        "graf@amazon.com" <graf@amazon.com>,
        "jschoenh@amazon.de" <jschoenh@amazon.de>,
        "karahmed@amazon.de" <karahmed@amazon.de>,
        "rimasluk@amazon.com" <rimasluk@amazon.com>,
        "Grimm, Jon" <Jon.Grimm@amd.com>,
        "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
Subject: [PATCH v4 09/17] svm: Add support for activate/deactivate AVIC at
 runtime
Thread-Topic: [PATCH v4 09/17] svm: Add support for activate/deactivate AVIC
 at runtime
Thread-Index: AQHVkQWC0JrNHs37ykiq/KcQAHfp2w==
Date:   Fri, 1 Nov 2019 22:41:32 +0000
Message-ID: <1572648072-84536-10-git-send-email-suravee.suthikulpanit@amd.com>
References: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com>
In-Reply-To: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com>
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Add necessary logics for supporting activate/deactivate AVIC at runtime.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
 arch/x86/kvm/svm.c | 28 ++++++++++++++++++++++------
 1 file changed, 22 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 21203a6..5b90458 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -388,6 +388,7 @@ struct amd_svm_iommu_ir {
 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
 static void svm_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa);
 static void svm_complete_interrupts(struct vcpu_svm *svm);
+static inline void avic_post_state_restore(struct kvm_vcpu *vcpu);
=20
 static int nested_svm_exit_handled(struct vcpu_svm *svm);
 static int nested_svm_intercept(struct vcpu_svm *svm);
@@ -1485,7 +1486,10 @@ static void avic_init_vmcb(struct vcpu_svm *svm)
 	vmcb->control.avic_logical_id =3D lpa & AVIC_HPA_MASK;
 	vmcb->control.avic_physical_id =3D ppa & AVIC_HPA_MASK;
 	vmcb->control.avic_physical_id |=3D AVIC_MAX_PHYSICAL_ID_COUNT;
-	vmcb->control.int_ctl |=3D AVIC_ENABLE_MASK;
+	if (kvm_apicv_activated(svm->vcpu.kvm))
+		vmcb->control.int_ctl |=3D AVIC_ENABLE_MASK;
+	else
+		vmcb->control.int_ctl &=3D ~AVIC_ENABLE_MASK;
 }
=20
 static void init_vmcb(struct vcpu_svm *svm)
@@ -1696,7 +1700,8 @@ static int avic_init_backing_page(struct kvm_vcpu *vc=
pu)
 	int id =3D vcpu->vcpu_id;
 	struct vcpu_svm *svm =3D to_svm(vcpu);
=20
-	ret =3D avic_update_access_page(vcpu->kvm, true);
+	if (kvm_apicv_activated(vcpu->kvm))
+		ret =3D avic_update_access_page(vcpu->kvm, true);
 	if (ret)
 		return ret;
=20
@@ -2188,7 +2193,8 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *k=
vm, unsigned int id)
 	/* We initialize this flag to true to make sure that the is_running
 	 * bit would be set the first time the vcpu is loaded.
 	 */
-	svm->avic_is_running =3D true;
+	if (irqchip_in_kernel(kvm) && kvm_apicv_activated(kvm))
+		svm->avic_is_running =3D true;
=20
 	svm->nested.hsave =3D page_address(hsave_page);
=20
@@ -2325,6 +2331,8 @@ static void svm_vcpu_blocking(struct kvm_vcpu *vcpu)
=20
 static void svm_vcpu_unblocking(struct kvm_vcpu *vcpu)
 {
+	if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
+		kvm_vcpu_update_apicv(vcpu);
 	avic_set_running(vcpu, true);
 }
=20
@@ -5190,17 +5198,25 @@ static int svm_set_pi_irte_mode(struct kvm_vcpu *vc=
pu, bool activate)
 	return ret;
 }
=20
-/* Note: Currently only used by Hyper-V. */
 static void svm_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu)
 {
 	struct vcpu_svm *svm =3D to_svm(vcpu);
 	struct vmcb *vmcb =3D svm->vmcb;
 	bool activated =3D kvm_vcpu_apicv_active(vcpu);
=20
-	if (activated)
+	if (activated) {
+		/**
+		 * During AVIC temporary deactivation, guest could update
+		 * APIC ID, DFR and LDR registers, which would not be trapped
+		 * by avic_unaccelerated_access_interception(). In this case,
+		 * we need to check and update the AVIC logical APIC ID table
+		 * accordingly before re-activating.
+		 */
+		avic_post_state_restore(vcpu);
 		vmcb->control.int_ctl |=3D AVIC_ENABLE_MASK;
-	else
+	} else {
 		vmcb->control.int_ctl &=3D ~AVIC_ENABLE_MASK;
+	}
 	mark_dirty(vmcb, VMCB_AVIC);
=20
 	svm_set_pi_irte_mode(vcpu, activated);
--=20
1.8.3.1