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[31.159.163.247]) by smtp.gmail.com with ESMTPSA id w15sm10084861wro.65.2019.11.02.03.01.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 02 Nov 2019 03:01:08 -0700 (PDT) Subject: Re: [PATCH v4 12/17] svm: Temporary deactivate AVIC during ExtINT handling To: "Suthikulpanit, Suravee" , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" Cc: "rkrcmar@redhat.com" , "joro@8bytes.org" , "vkuznets@redhat.com" , "rkagan@virtuozzo.com" , "graf@amazon.com" , "jschoenh@amazon.de" , "karahmed@amazon.de" , "rimasluk@amazon.com" , "Grimm, Jon" References: <1572648072-84536-1-git-send-email-suravee.suthikulpanit@amd.com> <1572648072-84536-13-git-send-email-suravee.suthikulpanit@amd.com> From: Paolo Bonzini Openpgp: preference=signencrypt Message-ID: Date: Sat, 2 Nov 2019 11:01:04 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <1572648072-84536-13-git-send-email-suravee.suthikulpanit@amd.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/11/19 23:41, Suthikulpanit, Suravee wrote: > + /* > + * IRQ window is not needed when AVIC is enabled, > + * unless we have pending ExtINT since it cannot be injected > + * via AVIC. In such case, we need to temporarily disable AVIC, > + * and fallback to injecting IRQ via V_IRQ. > + */ > + if (kvm_vcpu_apicv_active(vcpu)) > + svm_request_update_avic(vcpu, false); This must be pretty heavy-weight on SMP VMs, even if most ExtINT guests do not need SMP in the guest. One alternative is to enable/disable APICv when LVT or IOAPIC registers are written with ExtINT mode. Not a blocker, just an idea to consider. Paolo