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From:   =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>
To:     linux-realtek-soc@lists.infradead.org
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        =?UTF-8?q?Andreas=20F=C3=A4rber?= <afaerber@suse.de>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org
Subject: [RFC 5/7] ARM: dts: rtd1195: Add Mali node
Date:   Mon,  4 Nov 2019 02:39:30 +0100
Message-Id: <20191104013932.22505-6-afaerber@suse.de>
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Add a DT node for the Mali GPU.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 arch/arm/boot/dts/rtd1195.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi
index 774f95d544a3..ae8843782cfa 100644
--- a/arch/arm/boot/dts/rtd1195.dtsi
+++ b/arch/arm/boot/dts/rtd1195.dtsi
@@ -292,6 +292,25 @@
 			status = "disabled";
 		};
 
+		/* TODO 0x18030000 0x10000 or 0x18003000 0x1000? */
+		mali: gpu@18030000 {
+			compatible = "realtek,rtd1195-mali", "arm,mali-400";
+			reg = <0x18030000 0x10000>;
+			/* TODO which bus clk to pass? */
+			clocks = <&clkc RTD1195_CLK_EN_GPU>, <&osc27M>;
+			clock-names = "core", "bus";
+			resets = <&reset1 RTD1195_RSTN_GPU>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "gp",  "gpmmu",
+					  "pp0", "ppmmu0",
+					  "pp1", "ppmmu1";
+		};
+
 		gic: interrupt-controller@ff011000 {
 			compatible = "arm,cortex-a7-gic";
 			reg = <0xff011000 0x1000>,
-- 
2.16.4